Verification of timed circuits with failure-directed abstractions

Hao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda. Verification of timed circuits with failure-directed abstractions. IEEE Trans. on CAD of Integrated Circuits and Systems, 25(3):403-412, 2006. [doi]

Authors

Hao Zheng

This author has not been identified. Look up 'Hao Zheng' in Google

Chris J. Myers

This author has not been identified. Look up 'Chris J. Myers' in Google

David Walter

This author has not been identified. Look up 'David Walter' in Google

Scott Little

This author has not been identified. Look up 'Scott Little' in Google

Tomohiro Yoneda

This author has not been identified. Look up 'Tomohiro Yoneda' in Google