A Hardware-efficient Accelerator for Encoding Stage of Text-to-speech Synthesis - researchr publication authors

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Riyong Zheng, Chenghao Wang 0006, Jun Han 0003, Xiaoyang Zeng. A Hardware-efficient Accelerator for Encoding Stage of Text-to-speech Synthesis. In 13th IEEE International Conference on ASIC, ASICON 2019, Chongqing, China, October 29 - November 1, 2019. pages 1-3, IEEE, 2019. [doi]

This author has not been identified. Look up 'Riyong Zheng' in GoogleThis author has not been identified. Look up 'Chenghao Wang 0006' in GoogleThis author has not been identified. Look up 'Jun Han 0003' in GoogleThis author has not been identified. Look up 'Xiaoyang Zeng' in Google

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