Lagrangian relaxation based pin assignment and Through-Silicon Via planning for 3-D SoCs

Wei Zhong, Song Chen, Yang Geng, Takeshi Yoshimura. Lagrangian relaxation based pin assignment and Through-Silicon Via planning for 3-D SoCs. In IEEE 10th International Conference on ASIC, ASICON 2013, Shenzhen, China, October 28-31, 2013. pages 1-4, IEEE, 2013. [doi]

Abstract

Abstract is missing.