A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme

Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda. A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. In FPGA. pages 248, 2003. [doi]

Authors

Kuan Zhou

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Michael Chu

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Chao You

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Jong-Ru Guo

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Channakeshav

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John Mayega

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John F. McDonald

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Russell P. Kraft

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Bryan S. Goda

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