Table of Contents

• To alert, rescue and recover: critical information technologies for managing mega disastersJane W.-S. Liu. 1-2 [doi]
• Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trendsBenny Akesson, Po-Chun Huang, Fabien Clermidy, Denis Dutoit, Kees Goossens, Yuan-Hao Chang, Tei-Wei Kuo, Pascal Vivet, Drew Wingard. 3-12 [doi]
• An energy-efficient patchable accelerator for post-silicon engineering changesHiroaki Yoshida, Masahiro Fujita. 13-20 [doi]
• A bursty multi-port memory controller with quality-of-service guaranteesZefu Dai, Jianwen Zhu. 21-28 [doi]
• Designing VM schedulers for embedded real-time applicationsAlejandro Masrur, Thomas Pfeuffer, Martin Geier, Sebastian Drössler, Samarjit Chakraborty. 29-38 [doi]
• SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCsCesare Ferri, Andrea Marongiu, Benjamin Lipton, R. Iris Bahar, Tali Moreshet, Luca Benini, Maurice Herlihy. 39-48 [doi]
• A design methodology to implement memory accesses in high-level synthesisChristian Pilato, Fabrizio Ferrandi, Donatella Sciuto. 49-58 [doi]
• Correct and non-defensive glue design using abstract modelsStavros Tripakis, Hugo A. Andrade, Arkadeb Ghosal, Rhishikesh Limaye, Kaushik Ravindran, Guoqiang Wang, Guang Yang, Jacob Kornerup, Ian C. Wong. 59-68 [doi]
• Design and architectures for dependable embedded systemsJörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich. 69-78 [doi]
• SPMVisor: dynamic scratchpad memory virtualization for secure, low power, and high performance distributed on-chip memoriesLuis Angel D. Bathen, Nikil D. Dutt, Dongyoun Shin, Sung-Soo Lim. 79-88 [doi]
• Dynamic, multi-core cache coherence architecture for power-sensitive mobile processorsGaro Bournoutian, Alex Orailoglu. 89-98 [doi]
• PRET DRAM controller: bank privatization for predictability and temporal isolationJan Reineke, Isaac Liu, Hiren D. Patel, Sungjun Kim, Edward A. Lee. 99-108 [doi]
• Mapping of applications to MPSoCsPeter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, Lin Huang. 109-118 [doi]
• DistRM: distributed resource management for on-chip many-core systemsSebastian Kobbe, Lars Bauer, Daniel Lohmann, Wolfgang Schröder-Preikschat, Jörg Henkel. 119-128 [doi]
• Symbolic design space exploration for multi-mode reconfigurable systemsStefan Wildermann, Felix Reimann, Daniel Ziener, Jürgen Teich. 129-138 [doi]
• Constraint-driven synthesis and tool-support for FlexRay-based automotive control systemsReinhard Schneider 0001, Dip Goswami, Sohaib Zafar, Martin Lukasiewycz, Samarjit Chakraborty. 139-148 [doi]
• Reliability analysis for MPSoCs with mixed-critical, hard real-time constraintsPhilip Axer, Maurice Sebastian, Rolf Ernst. 149-158 [doi]
• Energy-efficient fixed-priority scheduling for real-time systems based on threshold work-demand analysisLinwei Niu, Wei Li. 159-168 [doi]
• On buffering with stochastic guarantees in resource-constrained media playersBalaji Raman, Guillaume Quintin, Wei Tsang Ooi, Deepak Gangadharan, Jerome Milan, Samarjit Chakraborty. 169-178 [doi]
• System-level power and timing variability characterization to compute thermal guaranteesPratyush Kumar, Lothar Thiele. 179-188 [doi]
• Economic learning for thermal-aware power budgeting in many-core architecturesThomas Ebi, David Kramer, Wolfgang Karl, Jörg Henkel. 189-196 [doi]
• A linear-time approach for the transient thermal simulation of liquid-cooled 3d icsAlain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid. 197-206 [doi]
• Capacity metric for chip heterogeneous multiprocessorsMwaffaq Otoom, JoAnn M. Paul. 207-216 [doi]
• Optimal memory controller placement for chip multiprocessorThomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen. 217-226 [doi]
• Modeling and analysis of micro-ring based silicon photonic interconnect for embedded systemsMoustafa Mohamed, Zheng Li, Xi Chen, Alan Rolf Mickelson, Li Shang. 227-236 [doi]
• Reliable software for unreliable hardware: embedded code generation aiming at reliabilitySemeen Rehman, Muhammad Shafique, Florian Kriebel, Jörg Henkel. 237-246 [doi]
• Analysis and optimization of fault-tolerant task scheduling on multiprocessor embedded systemsJia Huang, Jan Olaf Blech, Andreas Raabe, Christian Buckl, Alois Knoll. 247-256 [doi]
• Reliability-aware placement in SRAM-based FPGA for voltage scaling realization in the presence of process variationsShahin Golshan, Amin Khajeh, Houman Homayoun, Eli Bozorgzadeh, Ahmed M. Eltawil, Fadi J. Kurdahi. 257-266 [doi]
• Dynamic counters and the efficient and effective online power management of embedded real-time systemsKai Lampka, Kai Huang, Jian-Jia Chen. 267-276 [doi]
• Charge allocation for hybrid electrical energy storage systemsQing Xie, Yanzhi Wang, Younghyun Kim, Naehyuck Chang, Massoud Pedram. 277-284 [doi]
• Design entropy concept: a measurement for complexityBenjamin Menhorn, Frank Slomka. 285-294 [doi]
• HC-Sim: a fast and exact l1 cache simulator with scratchpad memory co-simulation supportYu-Ting Chen, Jason Cong, Glenn Reinman. 295-304 [doi]
• Dominator homomorphism based code matching for source-level simulation of embedded softwareStefan Stattelmann, Oliver Bringmann, Wolfgang Rosenstiel. 305-314 [doi]
• Exploiting temporal decoupling to accelerate trace-driven NoC emulationGummidipudi Krishnaiah, B. V. N. Silpa, Preeti Ranjan Panda, Anshul Kumar. 315-324 [doi]
• Emerging non-volatile memories: opportunities and challengesChun Jason Xue, Youtao Zhang, Yiran Chen, Guangyu Sun, Jianhua Yang, Hai Li. 325-334 [doi]
• Digital microfluidic biochips: recent research and emerging challengesTsung-Yi Ho, Krishnendu Chakrabarty, Paul Pop. 335-344 [doi]
• An efficient algorithm for isomorphism-aware custom instruction identification for extensible processorsJunwhan Ahn, Kiyoung Choi. 345-354 [doi]
• Branch penalty reduction on IBM cell SPUs via software branch hintingJing Lu, Yooseong Kim, Aviral Shrivastava, Chuan Huang. 355-364 [doi]
• Adaptive resource management for simultaneous multitasking in mixed-grained reconfigurable multi-core processorsWaheed Ahmed, Muhammad Shafique, Lars Bauer, Jörg Henkel. 365-374 [doi]
• Designing next-generation real-time streaming systemsSander Stuijk, Twan Basten, Benny Akesson, Marc Geilen, Orlando Moreira, Jan Reineke. 375-376 [doi]
• Digital microfluidic biochips: functional diversity, more than moore, and cyberphysical systemsKrishnendu Chakrabarty, Paul Pop, Tsung-Yi Ho. 377-378 [doi]
• ESWEEK industry keynote: embedding the cloudTed Chang. 379-380 [doi]
• EPIDETOX: an ESL platform for integrated circuit design and tool explorationKuen-Jong Lee, Chin-Yao Chang, I.-Jou Chen. 381-384 [doi]
• System-level design space exploration for three-dimensional (3D) SoCsQiaosha Zou, Yibo Chen, Yuan Xie, Alan Su. 385-388 [doi]
• System-level design exploration for 3-D stacked memory architecturesChi-Hung Lin, Wen-Tsan Hsieh, Hsien-Ching Hsieh, Chun-Nan Liu, Jen-Chieh Yeh. 389-390 [doi]