Abstract is missing.
- Message from the program committee chairsMakoto Ikeda, Fumio Arakawa. [doi]
- Message from the organizing committee chairHiroaki Kobayashi. [doi]
- Message from the advisory committee chairTadao Nakamura. [doi]
- Language runtime support for NVM/DRAM hybrid main memoryGaku Nakagawa, Shuichi Oikawa. 1-3 [doi]
- Aggressive use of Deep Sleep mode in low power embedded systemsJun'ichi Segawa, Yusuke Shirota, Koichi Fujisaki, Tetsuro Kimura, Tatsunori Kanai. 1-3 [doi]
- A low power NoC router using the marching memory through typeRyota Yasudo, Takahiro Kagami, Hideharu Amano, Yasunobu Nakase, Masashi Watanabe, Tsukasa Oishi, Toru Shimizu, Tadao Nakamura. 1-3 [doi]
- Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gatingHikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki. 1-3 [doi]
- Kernel data race detection using debug register in LinuxYunyun Jiang, Yi Yang, Tian Xiao, Tianwei Sheng, Wenguang Chen. 1-3 [doi]
- A flexibly fault-tolerant FU array processor and its self-tuning scheme to locate permanently defective unitJun Yao, Yasuhiko Nakashima, Mitsutoshi Saito, Yohei Hazama, Ryosuke Yamanaka. 1-3 [doi]
- An energy optimization method for vector processing mechanismsYe Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi. 1-3 [doi]
- A task-level pipelined many-SIMD augmented reality processor with congestion-aware network-on-chip schedulerGyeonghoon Kim, Seongwook Park, Kyuho Jason Lee, Youchang Kim, Injoon Hong, Kyeongryeol Bong, Dongjoo Shin, Sungpill Choi, Junyoung Park, Hoi-Jun Yoo. 1-3 [doi]
- A globally asynchronous locally synchronous DMR architecture for aggressive low-power fault tolerationYuttakon Yuttakonki, Jun Yao, Yasuhiko Nakashima. 1-3 [doi]
- Parallel design of control systems utilizing dead time for embedded multicore processorsYuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro. 1-3 [doi]
- Panel discussions: Toward wearable computing era, how COOL chip architecture and tools will evolve?Fumio Arakawa. 1-2 [doi]
- A fine grained power management supported by just-in-time compilerMotoki Wada, Mikiko Sato, Mitaro Namiki. 1-3 [doi]
- Establishing a standard interface between multi-manycore and software tools - SHIMMasaki Kondo, Fumio Arakawa, Masato Edahiro. 1-3 [doi]
- A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technologyKoichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham, Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita, Shiro Kamohara, Masaru Kadoshima, Keiichi Maekawa, Tomohiro Yamashita, Duc-Hung Le, Takumu Yomogita, Masaru Kudo, Kuniaki Kitamori, Shuya Kondo, Yuuki Manzawa. 1-3 [doi]
- A low power DRAM refresh control scheme for 3D memory cubeYing Wang, Yinhe Han, Huawei Li. 1-3 [doi]