Abstract is missing.
- Configurable architecture for memory BISTAtieh Lotfi, Parisa Kabiri, Zainalabedin Navabi. 1-5 [doi]
- Designing power supply (PS) using digital PID based on AVR microcontrollersTaghi Mohamadi. 1-5 [doi]
- Automated test bench generation for high-level synthesis flow ABELITETaavi Viilukas, Maksim Jenihhin, Jaan Raik, Raimund Ubar, Samary Baranov. 13-16 [doi]
- About dependability in cyber-physical systemsLiviu Miclea, Teodora Sanislav. 17-21 [doi]
- Self-healing capabilities through wireless reconfiguration of FPGAsGeorge Dan Mois, Mihai Hulea, Silviu Folea, Liviu Miclea. 22-27 [doi]
- Software testing of a simple networkJack H. Arabian. 28-31 [doi]
- A unifying formalism to support automated synthesis of SBSTs for embedded cachesStefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto. 39-42 [doi]
- Simulation-based hardware verification with time-abstract modelsAlexander Kamkin. 43-47 [doi]
- Programmable current biasing for low noise voltage controlled oscillatorsVazgen Melikyan, Armen Durgaryan. 47-50 [doi]
- Adaptive signal processing in multi-beam arraysVictor I. Djigan. 51-54 [doi]
- Optimization of microprogram control unit with code sharingAlexander Barkalov, Larysa Titarenko, Lukasz Smolinski. 55-59 [doi]
- Synthesis of control unit with refined state encoding for CPLD devicesAlexander Barkalov, Larysa Titarenko, Slawomir Chmielewski. 60-65 [doi]
- Cybercomputer for information space analysisVladimir Hahanov, Wajeb Gharibi, Dong-Won Park, Eugenia Litvinova. 66-71 [doi]
- Verification and diagnosis of SoC HDL-codeVladimir Hahanov, Dong-Won Park, Olesya Guz, Aleksey Priymak. 72-83 [doi]
- Diagnosis infrastructure of software-hardware systemsTiecoura Yves, Vladimir Hahanov, Omar Alnahhal, Mikhail Maksimov, Dmitry Shcherbin, Dmitry Yudin. 84-89 [doi]
- ® RTAX-S FPGAsOlga Melnikova. 90-93 [doi]
- Hardware reduction for matrix circuit of control Moore automatonAlexander Barkalov, Larysa Titarenko, Olena Hebda. 94-98 [doi]
- RoCoCo: Row and Column Compression for high-performance multiplication on FPGAsH. Fatih Ugurdag, Okan Keskin, Cihan Tunc, Fatih Temizkan, Gurbey Fici, Soner Dedeoglu. 98-101 [doi]
- Efficient selective compaction and un-compaction of inconsequential logical design units in the schematic representation of a designTarun Kumar Goyal, Amarpal Singh, Rahul Aggarwal. 106-112 [doi]
- Design of microprogrammed controllers with address converter implemented on programmable systems with embedded memoriesRemigiusz Wisniewski, Monika Wisniewska, Marek Wegrzyn, Norian Marranghello. 123-126 [doi]
- Reduction of the memory size in the microprogrammed controllersMonika Wisniewska, Remigiusz Wisniewski, Marek Wegrzyn, Norian Marranghello. 127-130 [doi]
- Maintaining uniformity in the processes of encryption and decryption with a variable number of encryption roundsLukasz Smolinski. 131-135 [doi]
- Advanced scan chain configuration method for broadcast decompressor architectureJiri Jenícek, Ondrej Novák, Martin Chloupek. 140-143 [doi]
- A programmable BIST with macro and micro codes for embedded SRAMsPalanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas, Mohammad Areef. 144-150 [doi]
- Modified protocol for data transmission in ad-hoc networks with high speed objects using directional antennasVictor Barinov, Alexey Smirnov, Danila Migalin. 150-153 [doi]
- High performance audio processing SoC platformDenis Muratov, Vladimir Boykov, Yuri Iskiv, Igor Smirnov, Valeriy Vertegel, Sergey Berdyshev, Yuri Gimpilevich, Gilad Keren. 154-157 [doi]
- Methodology of the pre-silicon verification of the processor coreSergii Berdyshev, Vladimir Boykov, Yuri Gimpilevich, Yuri Iskiv, Gilad Keren, Denis Muratov, Igor Smirnov, Valeriy Vertegel. 158-160 [doi]
- Spam diagnosis infrastructure for individual cyberspaceVladimir Hahanov, Aleksandr Mischenko, Svetlana Chumachenko, Anna Hahanova, Alexey Priymak. 161-168 [doi]
- A security model of individual cyberspaceAlexander Adamov, Vladimir Hahanov. 169-172 [doi]
- Organization of pipeline operations in mapping unit of the dataflow parallel computing systemN. N. Levchenko, A. S. Okunev, D. E. Yakhontov. 173-176 [doi]
- Debugging and testing features of the dataflow parallel computing system components and devicesN. N. Levchenko, A. S. Okunev, D. E. Yakhontov, D. N. Zmejev. 180-183 [doi]
- Adaptive wavelet codec for noisy image compressionYuri S. Bekhtin. 184-188 [doi]
- TCAD-SPICE simulation of MOSFET switch delay time for different CMOS technologiesK. O. Petrosyants, E. V. Orekhov, D. A. Popov, I. A. Kharitonov, L. M. Sambursky, A. P. Yatmanov, A. V. Voevodin, A. N. Mansurov. 188-190 [doi]
- Design fault injection-based technique and tool for FPGA projects verificationL. Reva, Vitaliy Kulanov, Vyacheslav S. Kharchenko. 191-195 [doi]
- Optimal schematic design of low-Q IP blocksSergey G. Krutchinsky, Mikhail S. Tsybin. 196-199 [doi]
- Parallelizing of Boolean function system for device simulationAlexander Chemeris, Svetlana Reznikova. 200-202 [doi]
- Optimization some characteristics of continuous phase spread spectrum signalMichael Balanov, Olga Mamedova. 203-206 [doi]
- A generation of canonical forms for design of IIR digital filtersVladislav A. Lesnikov, Tatiana V. Naumovich, Alexander V. Chastikov, Sergey V. Armishev. 221-224 [doi]
- Variant of wireless MIMO channel security estimation model based on cluster approachO. Kuznietsov, O. Tsopa. 225-229 [doi]
- Compact DSM MOSFET model and its parameters extractionAnatoly Belous, Vladislav Nelayev, Sergey Shvedov, Viktor Stempitsky, Tran Tuan Trung, Arkady Turtsevich. 230-232 [doi]
- IGBT technology design and device optimizationArtem Artamonov, Vladislav Nelayev, Ibrahim Shelibak, Arkady Turtsevich. 233-236 [doi]
- Device-process simulation of discrete silicon stabilitron with the stabilizing voltage of 6, 5 VN. L. Dudar, V. M. Borzdov. 237-239 [doi]
- Geometrical approach to technical diagnosing of automatonsV. A. Tverdokhlebov. 240-243 [doi]
- On experimental research of efficiency of tests construction for combinational circuits by the focused search methodVasily Kulikov, Vladimir Mokhor. 247-250 [doi]
- Test set compaction procedure for combinational circuits based on decomposition treeValentina Andreeva. 251-254 [doi]
- Implementation by the special formula of an arbitrary subset of code words of (m, n)-code for designing a self-testing checkerN. Butorina, S. Ostanin. 255-258 [doi]
- Optimal fluctuations for satisfactory performance under parameter uncertaintyH. J. Kadim. 259-263 [doi]
- The evidential independent verification of software of information and control systems, critical to safety: Functional model of scenarioKonorev Borys, Sergiyenko Volodymyr, Chertkov Georgiy. 263-266 [doi]
- Si BJT and SiGe HBT performance modeling after neutron radiation exposureKonstantin Petrosyants, Eric Vologdin, Dmitry Smirnov, Rostislav Torgovnikov, Maxim Kozhukhov. 267-270 [doi]
- Thermal analysis of the ball grid array packagesK. O. Petrosyants, N. I. Rjabov. 275-278 [doi]
- Selection of the state variables for partial enhanced scan techniquesAnzhela Matrosova, Alexey Melnikov, Ruslan Mukhamedov, Virendra Singh. 285-290 [doi]
- A diagnostic model for detecting functional violation in HDL-code of System-on-ChipNgene Christopher Umerah, Hahanov Vladimir Ivanovich. 299-302 [doi]
- Competence as a support factor of the computer system operationGennady Krivoulya, Alexander Shkil, Dariya Kucherenko. 303-310 [doi]
- A model of spatial thinking for computational intelligenceKirill A. Sorudeykin. 311-318 [doi]
- New methods and tools for design of tests memoryMudar Almadi, Diaa Moamar, Vladimir Ryabtsev. 319-325 [doi]
- A calculation of parasitic signal components digital filtration for the retransmission meter on the basis of FPGAD. A. Velychko, I. I. Vdovychenko. 335-336 [doi]
- The Testware CADVictor Zviagin. 337-340 [doi]
- Lyapunov function analysis for different strategies of circuit optimizationAlexander Zemliak, Antonio Michua, T. M. Markina. 345-348 [doi]
- Modeling a logical network of relations of semantic items in superphrasal unitiesNina Khairova, Natalia Sharonova. 360-365 [doi]
- Designing ISA card with easy interfaceTaghi Mohamadi. 372-376 [doi]
- Real Time Operating System for AVR microcontrollersTaghi Mohamadi. 376-380 [doi]
- Infrastructure for testing and diagnosing multimedia devicesVladimir Hahanov, Karyna Mostova, Oleksandr Paschenko. 394-399 [doi]
- Designing an embedded system for interfacing with networks based on ARMTaghi Mohamadi. 407-410 [doi]
- Checkability of the digital components in safety-critical systems: Problems and solutionsAlexander Drozd, Vyacheslav S. Kharchenko, Svetlana Antoshchuk, J. Sulima, Miroslav Drozd. 411-416 [doi]