Abstract is missing.
- Silent Simon: A threshold implementation under 100 slicesAria Shahverdi, Mostafa Taha, Thomas Eisenbarth. 1-6 [doi]
- Robust true random number generator using hot-carrier injection balanced metastable sense amplifiersMudit Bhargava, Kaship Sheikh, Ken Mai. 7-13 [doi]
- Efficient and secure split manufacturing via obfuscated built-in self-authenticationKan Xiao, Domenic Forte, Mark Mohammad Tehranipoor. 14-19 [doi]
- Security analysis of index-based syndrome coding for PUF-based key generationGeorg T. Becker, Alexander Wild, Tim Güneysu. 20-25 [doi]
- Exploiting resistive cross-point array for compact design of physical unclonable functionPai-Yu Chen, Runchen Fang, Rui Liu, Chaitali Chakrabarti, Yu Cao, Shimeng Yu. 26-31 [doi]
- A family of Schmitt-Trigger-based arbiter-PUFs and selective challenge-pruning for robustness and qualityCheng-Wei Lin, Swaroop Ghosh. 32-37 [doi]
- Maximum-likelihood decoding of device-specific multi-bit symbols for reliable key generationMeng-Day Mandel Yu, Matthias Hiller, Srinivas Devadas. 38-43 [doi]
- A practical DPA on Grain v1 using LS-SVMAbhishek Chakraborty, Bodhisatwa Mazumdar, Debdeep Mukhopadhyay. 44-47 [doi]
- FPGA SoC architecture and runtime to prevent hardware Trojans from leaking secretsGedare Bloom, Bhagirath Narahari, Rahul Simha, Ali Namazi, Renato Levy. 48-51 [doi]
- A security-aware design scheme for better hardware Trojan detection sensitivityChongxi Bao, Yang Xie, Ankur Srivastava. 52-55 [doi]
- Automatic obfuscated cell layout for trusted split-foundry designCarlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill, Rajit Manohar. 56-61 [doi]
- High precision fault injections on the instruction cache of ARMv7-M architecturesLionel Rivière, Zakaria Najm, Pablo Rauzy, Jean-Luc Danger, Julien Bringer, Laurent Sauvage. 62-67 [doi]
- Power analysis of the t-private logic style for FPGAsZachary N. Goddard, Nicholas LaJeunesse, Thomas Eisenbarth. 68-71 [doi]
- TVVF: Estimating the vulnerability of hardware cryptosystems against timing violation attacksBilgiday Yuce, Nahid Farhady Ghalaty, Patrick Schaumont. 72-77 [doi]
- Validation of RTL laser fault injection model with respect to layout informationAthanasios Papadimitriou, Marios Tampas, David Hély, Vincent Beroulle, Paolo Maistri, Régis Leveugle. 78-81 [doi]
- Linear complementary dual code improvement to strengthen encoded circuit against hardware Trojan horsesXuan Thuy Ngo, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm. 82-87 [doi]
- Preventing fault attack on stream cipher using randomizationShamit Ghosh, Dipanwita Roy Chowdhury. 88-91 [doi]
- Post-layout estimation of side-channel power supply signaturesSushmita Kadiyala Rao, Deepak Krishnankutty, Ryan Robucci, Nilanjan Banerjee, Chintan Patel. 92-95 [doi]
- Template attack on masking AES based on fault sensitivity analysisQian Wang, an Wang, Liji Wu, Gang Qu, Guoshuang Zhang. 96-99 [doi]
- Diagonal fault analysis of Gr⊘stl in dedicated MAC modeDhiman Saha, Dipanwita Roy Chowdhury. 100-105 [doi]
- Neural network based attack on a masked implementation of AESRichard Gilmore, Neil Hanley, Máire O'Neill. 106-111 [doi]
- A DPA-resistant self-timed three-phase dual-rail pre-charge logic familyNail Etkin Can Akkaya, Burak Erbagci, Raymond Carley, Ken Mai. 112-117 [doi]
- Efficient 2nd-order power analysis on masked devices utilizing multiple leakageLiwei Zhang, A. Adam Ding, Yunsi Fei, Pei Luo. 118-123 [doi]
- Simulation and analysis of negative-bias temperature instability aging on power analysis attacksXiaofei Guo, Naghmeh Karimi, Francesco Regazzoni, Chenglu Jin, Ramesh Karri. 124-129 [doi]
- Achieving side-channel protection with dynamic logic reconfiguration on modern FPGAsPascal Sasdrich, Amir Moradi, Oliver Mischke, Tim Güneysu. 130-136 [doi]
- Evaluating the security of logic encryption algorithmsPramod Subramanyan, Sayak Ray, Sharad Malik. 137-143 [doi]
- GDS-II Trojan detection using multiple supply pad VDD and GND IDDQs in ASIC functional unitsI. Wilcox, Fareena Saqib, James F. Plusquellic. 144-150 [doi]
- Resilient hardware Trojans detection based on path delay measurementsIngrid Exurville, Loïc Zussa, Jean-Baptiste Rigaud, Bruno Robisson. 151-156 [doi]
- Physically secure and fully reconfigurable data storage using optical scatteringRoarke Horstmeyer, Sid Assawaworrarit, Ulrich Rührmair, Changhuei Yang. 157-162 [doi]
- Toward automatic proof generation for information flow policies in third-party hardware IPMohammad-Mahdi Bidmeshki, Yiorgos Makris. 163-168 [doi]