Abstract is missing.
- M7: Next generation SPARCStephen Phillips. 1-27 [doi]
- Hot Chips 2014 Nvidia's denver processorDarrell Boggs, Gary Brown, Bill Rozas, Nathan Tuck, K. S. Venkatraman. 1-25 [doi]
- High-level synthesis of memory bound and irregular parallel applications with BambuVito Giovanni Castellana, Antonino Tumeo, Fabrizio Ferrandi. 1 [doi]
- Myriad 2: Eye of the computational vision stormDavid Moloney, Brendan Barry, Richard Richmond, Fergal Connor, Cormac Brick, David Donohoe. 1-18 [doi]
- Security basicsRuby B. Lee. 1-32 [doi]
- A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep modeShiro Kamohara, Nobuyuki Sugii, Koichiro Ishibashi, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham. 1 [doi]
- Secure systems designLeendert van Doorn. 1-31 [doi]
- Ultra-low power design approaches for IoTMassimo Alioto. 1-57 [doi]
- NVIDIA'S Tegra K1 system-on-chipMichael Ditty, Tegra Architecture, John Montrym, Craig M. Wittenbrink. 1-26 [doi]
- Have your cake in parallel and eat it sequentially too! Semantically sequential, parallel execution of multiprocessor programsGagan Gupta. 1 [doi]
- Goldstrike 1: Cointerra's first generation crypto-currency processor for bitcoin mining machinesJaved Barkatullah, Timo Hanke, Ravi Iyengar, Ricky Lewelling, Jim O'Connor. 1-16 [doi]
- Design of a high-density SoC FPGA at 20nmBrad Vest, Sean Atsatt, Mike Hutton. 1-24 [doi]
- SPARC64™ XIfx: Fujitsu's next generation processor for HPCToshio Yoshida. 1-31 [doi]
- ARM next-generation IP supporting Avago high-end networkingMike Filippo, David Sonnier. 1-21 [doi]
- SX-ACE processor: NEC's brand-new vector processorShintaro Momose. 1-27 [doi]
- Memory processing unitsJaikrishnan Menon, Lorenzo De Carli, Vijayraghavan Thiruvengadam, Karthikeyan Sankaralingam, Cristian Estan. 1 [doi]
- Applying AMD's Kaveri APU for heterogeneous computingDan Bouvier, Ben Sander. 1-42 [doi]
- Performance characteristics of the POWER8 processorAlex E. Mericas. 1-26 [doi]
- Welcome program chairsSamuel Naffziger, Guri Sohi. 1-2 [doi]
- Next generation SPARC processor cache hierarchyRam Sivaramakrishnan, Sumti Jairath. 1-28 [doi]
- The internet of everythingRob Chandhok. 1-29 [doi]
- Mitigating exploits, rootkits and advanced persistent threatsDavid Durham. 1-39 [doi]
- High capacity and high performance 20nm FPGAsSteve Young, Dinesh Gaitonde. 1-21 [doi]
- Level-3 BLAS on myriad multi-core media-processor SoCTomasz Szydzik, Marius Farcas, Valeriu Ohan, David Moloney. 1 [doi]
- Precision refinement for media-processor SoCs: fp32 -> fp64 on myriadTomasz Szydzik, David Moloney. 1 [doi]
- Intel C2000 atom microserver power efficient processing for the data centerBradley Burres, Johan van de Groenendaal, Jonathan Robinson, Ian Steiner. 1-25 [doi]
- Low power fixed-latency DSP accelerator with autonomous minimum energy tracking (AMET)Chung-Hsun Huang, Wei-Jen Chen, Keng-Jui Chang, Yi-Hsuan Ting, Keng-Chang Hsu, Yu-Fu Pan, Chao-Chun Chen, Yuan-Hua Chu, Tay-Jyi Lin, Jinn-Shyan Wang. 1 [doi]
- Mobile hardware securityVikas Chandra, Rob Aitken. 1-40 [doi]
- AppliedMicro X-Gene2Gaurav Singh, Greg Favor, Alfred Yeung. 1-24 [doi]
- CMOS biochips for point-of-care molecular diagnosticsArjang Hassibi. 1-32 [doi]
- Ivybridge server architecture: A converged serverIrma Esmer Papazian, Sailesh Kottapalli. 1-29 [doi]
- SCORPIO: 36-core shared memory processor demonstrating snoopy coherence on a mesh interconnectChia-Hsin Owen Chen, Sunghyun Park, Suvinay Subramanian, Tushar Krishna, Bhavya K. Daya, Woo-Cheol Kwon, Brett Wilkerson, John Arends, Anantha Chandrakasan, Li-Shiuan Peh. 1-20 [doi]
- Power constraints: From sensors to serversMike Muller. 1-37 [doi]
- RayChip®: Real-time ray-tracing chip for embedded applicationsWoo-Chan Park, Hee-Jin Shin, Byoungok Lee, Hyung-Min Yoon, Tack-Don Han. 1-32 [doi]
- Hardware-accelerated text analyticsRaphael Polig, Kubilay Atasu, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, Peter Hofstee. 1-24 [doi]
- University research in hardware securityRuby B. Lee. 1-27 [doi]
- Connecting the internet of everythingMike Stauffer. 1-38 [doi]
- OpenPOWER: Reengineering a server ecosystem for large-scale data centersMichael Gschwind. 1-28 [doi]
- Bridge chip composing a PCIe switch over ethernet to make a seamless disaggregated computer in data-center scaleTakashi Yoshikawa, Jun Suzuki, Yoichi Hidaka, Junichi Higuchi, Shinji Abe. 1 [doi]
- Powering the internet of thingsYogesh K. Ramadass. 1-50 [doi]
- HotChips security tutorialRuby B. Lee, Vikas Chandra, Leendert van Doorn, David Durham. 1-5 [doi]
- HBM: Memory solution for bandwidth-hungry processorsJoonyoung Kim, Younsu Kim. 1-24 [doi]
- SDA: Software-defined accelerator for large-scale DNN systemsJian Ouyang, Shiding Lin, Wei Qi, Yong Wang, Bo Yu, Song Jiang. 1-23 [doi]