Table of Contents

• Salus: Efficient Security Support for CXL-Expanded GPU MemoryRahaf Abdullah, Hyokeun Lee, Huiyang Zhou, Amro Awad. 1-15 [doi]
• Exploitation of Security Vulnerability on RetirementKe Xu, Ming Tang 0002, Quancheng Wang, Han Wang. 1-14 [doi]
• Revet: A Language and Compiler for Dataflow ThreadsAlexander C. Rucker, Shiv Sundram, Coleman-Smith, Matthew Vilim, Raghu Prabhakar, Fredrik Kjølstad, Kunle Olukotun. 1-14 [doi]
• WASP: Exploiting GPU Pipeline Parallelism with Hardware-Accelerated Automatic Warp SpecializationNeal Clayton Crago, Sana Damani, Karthikeyan Sankaralingam, Stephen W. Keckler. 1-16 [doi]
• MINOS: Distributed Consistency and Persistency Protocol Implementation & Offloading to SmartNICsAntonis Psistakis, Fabien Chaix, Josep Torrellas. 1-17 [doi]
• Enhancing Collective Communication in MCM Accelerators for Deep Learning TrainingSabuj Laskar, Pranati Majhi, Sungkeun Kim, Farabi Mahmud, Abdullah Muzahid, Eun Jung Kim 0001. 1-16 [doi]
• GADGETSPINNER: A New Transient Execution Primitive Using the Loop Stream DetectorYun Chen, Ali Hajiabadi, Trevor E. Carlson. 15-30 [doi]
• Uncovering and Exploiting AMD Speculative Memory Access Predictors for Fun and ProfitChang Liu, Dongsheng Wang 0002, Yongqiang Lyu 0001, Pengfei Qiu, Yu Jin, Zhuoyuan Lu, Yinqian Zhang, Gang Qu 0001. 31-45 [doi]
• E2EMap: End-to-End Reinforcement Learning for CGRA Compilation via Reverse MappingDajiang Liu, Yuxin Xia, Jiaxing Shang, Jiang Zhong, Peng Ouyang, Shouyi Yin. 46-60 [doi]
• An Optimizing Framework on MLIR for Efficient FPGA-based Accelerator GenerationWeichuang Zhang, Jieru Zhao, Guan Shen, Quan Chen, Chen Chen 0067, Minyi Guo. 75-90 [doi]
• TALCO: Tiling Genome Sequence Alignment Using Convergence of Traceback PointersSumit Walia, Cheng Ye, Arkid Bera, Dhruvi Lodhavia, Yatish Turakhia. 91-107 [doi]
• Celeritas: Out-of-Core Based Unsupervised Graph Neural Network via Cross-Layer Computing 2024Yi Li, Tsun-Yu Yang, Ming-Chang Yang, Zhaoyan Shen, Bingzhe Li. 91-107 [doi]
• PruneGNN: Algorithm-Architecture Pruning Framework for Graph Neural Network AccelerationDeniz Gurevin, Mohsin Shan, Shaoyi Huang, Md Amit Hasan, Caiwen Ding, Omer Khan. 108-123 [doi]
• MEGA: A Memory-Efficient GNN Accelerator Exploiting Degree-Aware Mixed-Precision QuantizationZeyu Zhu, Fanrong Li, Gang Li 0015, Zejian Liu, Zitao Mo, Qinghao Hu, Xiaoyao Liang, Jian Cheng 0001. 124-138 [doi]
• Bandwidth-Effective DRAM Cache for GPU s with Storage-Class MemoryJeongmin Hong, Sungjun Cho, Geonwoo Park, Wonhyuk Yang, Young-Ho Gong, Gwangsun Kim. 139-155 [doi]
• Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet AcceleratorsJingwei Cai, Zuotong Wu, Sen Peng, Yuchen Wei, Zhanhong Tan, Guiming Shi, Mingyu Gao, Kaisheng Ma. 156-171 [doi]
• Stellar: Energy-Efficient and Low-Latency SNN Algorithm and Hardware Co-Design with Spatiotemporal ComputationRuixin Mao, Lin Tang, Xingyu Yuan, Ye Liu, Jun Zhou 0017. 172-185 [doi]
• MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data ComputingGeraldo F. Oliveira, Ataberk Olgun, Abdullah Giray Yaglikçi, F. Nisa Bostanci, Juan Gómez-Luna, Saugata Ghose, Onur Mutlu. 186-203 [doi]
• Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata ManagementSeonjin Na, Jungwoo Kim 0002, Sunho Lee, Jaehyuk Huh. 204-217 [doi]
• Data Enclave: A Data-Centric Trusted Execution EnvironmentYuanchao Xu 0001, James Pangia, Chencheng Ye, Yan Solihin, Xipeng Shen. 218-232 [doi]
• Morphling: A Throughput-Maximized TFHE-based Accelerator using Transform-domain ReusePrasetiyo, Adiwena Putra, Joo-Young Kim 0001. 249-262 [doi]
• Pathfinding Future PIM Architectures by Demystifying a Commercial PIM TechnologyBongjoon Hyun, Taehun Kim, Dongjae Lee, Minsoo Rhu. 263-279 [doi]
• Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and AnalysisIsmail Emir Yüksel, Yahya Can Tugrul, Ataberk Olgun, F. Nisa Bostanci, Abdullah Giray Yaglikçi, Geraldo F. Oliveira, Haocong Luo, Juan Gómez-Luna, Mohammad Sadrosadati, Onur Mutlu. 280-296 [doi]
• StreamPIM: Streaming Matrix Computation in Racetrack MemoryYuda An, Yunxiao Tang, Shushu Yi, Li Peng, Xiurui Pan, Guangyu Sun 0003, Zhaochu Luo, Qiao Li, Jie Zhang. 297-311 [doi]
• SmartDIMM: In-Memory Acceleration of Upper Layer ProtocolsNeel Patel, Amin Mamandipoor, Mohammad Nouri, Mohammad Alian. 312-329 [doi]
• BeaconGNN: Large-Scale GNN Acceleration with Out-of-Order Streaming In-Storage ComputingYuyue Wang 0001, Xiurui Pan, Yuda An, Jie Zhang, Glenn Reinman. 330-344 [doi]
• Smart-Infinity: Fast Large Language Model Training using Near-Storage Processing on a Real SystemHongsun Jang, Jaeyong Song, Jaewon Jung 0001, Jaeyoung Park, Youngsok Kim, Jinho Lee. 345-360 [doi]
• FlashGNN: An In-SSD Accelerator for GNN TrainingFuping Niu, Jianhui Yue, Jiangqiu Shen, Xiaofei Liao, Hai Jin 0001. 361-378 [doi]
• DockerSSD: Containerized In-Storage Processing and Hardware Acceleration for Computational SSDsDonghyun Gouk, Miryeong Kwon, Hanyeoreum Bae, Myoungsoo Jung. 379-394 [doi]
• PREFETCHX: Cross-Core Cache-Agnostic Prefetcher-based Side-Channel AttacksYun Chen, Ali Hajiabadi, Lingfeng Pei, Trevor E. Carlson. 395-408 [doi]
• Modeling, Derivation, and Automated Analysis of Branch Predictor Security VulnerabilitiesQuancheng Wang, Ming Tang 0002, Ke Xu, Han Wang. 409-423 [doi]
• SegScope: Probing Fine-grained Interrupts via Architectural FootprintsXin Zhang, Zhi Zhang 0001, Qingni Shen, Wenhao Wang 0001, Yansong Gao, Zhuoxi Yang, Jiliang Zhang 0002. 424-438 [doi]
• Differential-Matching Prefetcher for Indirect Memory AccessGelin Fu, Tian Xia 0008, Zhongpei Luo, Ruiyang Chen, Wenzhe Zhao, Pengju Ren. 439-453 [doi]
• SPADE: Sparse Pillar-based 3D Object Detection Accelerator for Autonomous DrivingMinJae Lee, Seongmin Park, Hyungmin Kim, Minyong Yoon, Janghwan Lee, Jun Won Choi, Nam Sung Kim, Mingu Kang, Jungwook Choi. 454-467 [doi]
• Rapper: A Parameter-Aware Repair-in-Memory Accelerator for Blockchain Storage PlatformChenlin Ma, Yingping Wang, Fuwen Chen, Jing Liao 0008, Yi Wang 0003, Rui Mao 0001. 468-482 [doi]
• MOPED: Efficient Motion Planning Engine with Flexible Dimension SupportLingyi Huang, Yu Gong, Yang Sui, Xiao Zang, Bo Yuan 0001. 483-497 [doi]
• Effective Context-Sensitive Memory Dependence PredictionSebastian S. Kim, Alberto Ros 0001. 515-527 [doi]
• A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch FilteringAlexandre Valentin Jamet, Georgios Vavouliotis, Daniel A. Jiménez, Lluc Alvarez, Marc Casas. 528-542 [doi]
• Gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC ArchitecturesOdysseas Chatzopoulos, George Papadimitriou 0001, Vasileios Karakostas, Dimitris Gizopoulos. 543-559 [doi]
• Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future SolutionsAbdullah Giray Yaglikçi, Yahya Can Tugrul, Geraldo F. Oliveira, Ismail Emir Yüksel, Ataberk Olgun, Haocong Luo, Onur Mutlu. 560-577 [doi]
• START: Scalable Tracking for any Rowhammer ThresholdAnish Saxena, Moinuddin K. Qureshi. 578-592 [doi]
• CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low CostF. Nisa Bostanci, Ismail Emir Yüksel, Ataberk Olgun, Konstantinos Kanellopoulos, Yahya Can Tugrul, A. Giray Yagliçi, Mohammad Sadrosadati, Onur Mutlu. 593-612 [doi]
• A Quantum Computer Trusted Execution EnvironmentTheodoros Trochatos, Chuanqi Xu, Sanjay Deshpande, Yao Lu, Yongshan Ding 0001, Jakub Szefer. 613 [doi]
• Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative ModelsJaewan Choi, Jaehyun Park 0006, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn. 614 [doi]
• Computational CXL-Memory Solution for Accelerating Memory-Intensive ApplicationsJoonseop Sim, Soohong Ahn, Taeyoung Ahn, Seungyong Lee 0005, Myunghyun Rhee, Jooyoung Kim, Kwangsik Shin, Donguk Moon, Euiseok Kim, Kyoung Park. 615 [doi]
• LearnedFTL: A Learning-Based Page-Level FTL for Reducing Double Reads in Flash-Based SSDsShengzhe Wang, Zihang Lin, Suzhen Wu, Hong Jiang 0001, Jie Zhang, Bo Mao. 616-629 [doi]
• Are Superpages Super-fast? Distilling Flash Blocks to Unify Flash Pages of a Superpage in an SSDShih-Hung Tseng, Tseng-Yi Chen, Ming-Chang Yang. 630-642 [doi]
• RiF: Improving Read Performance of Modern SSDs Using an On-Die Early-Retry EngineMyoungjun Chun, Jaeyong Lee 0004, Myungsuk Kim, Jisung Park 0001, Jihong Kim 0001. 643-656 [doi]
• Midas Touch: Invalid-Data Assisted Reliability and Performance Boost for 3d High-Density FlashQiao Li 0001, Hongyang Dang, Zheng Wan, Congming Gao, Min Ye, Jie Zhang, Tei-Wei Kuo, Chun Jason Xue. 657-670 [doi]
• ECO-CHIP: Estimation of Carbon Footprint of Chiplet-based Architectures for Sustainable VLSIChetan Choppali Sudarshan, Nikhil Matkar, Sarma B. K. Vrudhula, Sachin S. Sapatnekar, Vidya A. Chhabria. 671-685 [doi]
• Lightening-Transformer: A Dynamically-Operated Optically-Interconnected Photonic Transformer AcceleratorHanqing Zhu, Jiaqi Gu, Hanrui Wang 0002, Zixuan Jiang, Zhekai Zhang, Rongxing Tang, Chenghao Feng, Song Han 0003, Ray T. Chen, David Z. Pan. 686-703 [doi]
• MIRAGE: Quantum Circuit Decomposition and Routing Collaborative Design Using Mirror GatesEvan McKinney, Michael Hatridge, Alex K. Jones. 704-718 [doi]
• SACHI: A Stationarity-Aware, All-Digital, Near-Memory, Ising ArchitectureSiddhartha Raman Sundara Raman, Lizy K. John, Jaydeep P. Kulkarni. 719-731 [doi]
• BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning AccelerationMan Shi, Vikram Jain, Antony Joseph, Maurice Meijer, Marian Verhelst. 732-746 [doi]
• LUTein: Dense-Sparse Bit-Slice Architecture With Radix-4 LUT-Based Slice-Tensor Processing UnitsDongseok Im, Hoi-Jun Yoo. 747-759 [doi]
• FIGNA: Integer Unit-Based Accelerator Design for FP-INT GEMM Preserving Numerical AccuracyJaeyong Jang, Yulhwa Kim, Juheun Lee, Jae-Joon Kim. 760-773 [doi]
• ASADI: Accelerating Sparse Attention Using Diagonal-based In-Situ ComputingHuize Li, Zhaoying Li, Zhenyu Bai, Tulika Mitra. 774-787 [doi]
• Enabling Large Dynamic Neural Network Training with Learning-based Memory ManagementJie Ren 0015, Dong Xu, Shuangyan Yang, Jiacheng Zhao, Zhicheng Li, Christian Navasca, Chenxi Wang, Guoqing Harry Xu, Dong Li. 788-802 [doi]
• Tessel: Boosting Distributed Execution of Large DNN Models via Flexible Schedule SearchZhiqi Lin, Youshan Miao, Guanbin Xu, Cheng Li 0001, Olli Saarikivi, Saeed Maleki, Fan Yang. 803-816 [doi]
• SpecFL: An Efficient Speculative Federated Learning System for Tree-based Model TrainingYuhui Zhang, Lutan Zhao, Cheng Che, Xiaofeng Wang 0001, Dan Meng, Rui Hou 0001. 817-831 [doi]
• TinyTS: Memory-Efficient TinyML Model Compiler Framework on MicrocontrollersYu-Yuan Liu, Hong-Sheng Zheng, Yu Fang Hu, Chen-Fong Hsu, Tsung Tai Yeh. 848-860 [doi]
• CAMEL: Co-Designing AI Models and eDRAMs for Efficient On-Device LearningSai Qian Zhang, Thierry Tambe, Nestor Cuevas, Gu-Yeon Wei, David Brooks 0001. 861-875 [doi]
• FlipBit: Approximate Flash Memory for IoT DevicesAlexander Buck, Karthik Ganesan 0002, Natalie Enright Jerger. 876-890 [doi]
• Usas: A Sustainable Continuous-Learning' Framework for Edge ServersCyan Subhra Mishra, Jack Sampson, Mahmut Taylan Kandemir, Vijaykrishnan Narayanan, Chita R. Das. 891-907 [doi]
• Cepheus: Accelerating Datacenter Applications with High-Performance RoCE-Capable MulticastWenxue Li, Junyi Zhang 0005, Yufei Liu, Gaoxiong Zeng, Zilong Wang 0007, Chaoliang Zeng, Pengpeng Zhou, Qiaoling Wang, Kai Chen 0005. 908-921 [doi]
• LibPreemptible: Enabling Fast, Adaptive, and Hardware-Assisted User-Space SchedulingYueying Li, Nikita Lazarev, David Koufaty, Tenny Yin, Andy Anderson, Zhiru Zhang, G. Edward Suh, Kostis Kaffes, Christina Delimitrou. 922-936 [doi]
• Ursa: Lightweight Resource Management for Cloud-Native MicroservicesYanqi Zhang, Zhuangzhuang Zhou, Sameh Elnikety, Christina Delimitrou. 954-969 [doi]
• An LPDDR-based CXL-PNM Platform for TCO-efficient Inference of Transformer-based Large Language ModelsSangsoo Park, Kyungsoo Kim, Jinin So, Jin Jung, JongGeon Lee, Kyoungwan Woo, Nayeon Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, Jinhyun Kim, Jieun Lee, YeonGon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, Nam Sung Kim. 970-982 [doi]
• LightPool: A NVMe-oF-based High-performance and Lightweight Storage Pool Architecture for Cloud-Native Distributed DatabaseJiexiong Xu, Yiquan Chen, Yijing Wang, Wenhui Shi, Guoju Fang, Yi Chen, Huasheng Liao, Yang Wang, Hai Lin, Zhen Jin 0008, Qiang Liu, Wenzhi Chen. 983-995 [doi]
• Enterprise-Class Cache Compression DesignAlper Buyuktosunoglu, David Trilla, Bülent Abali, Deanna Postles Dunn Berger, Craig R. Walters, Jang-Soo Lee. 996-1011 [doi]
• HotTiles: Accelerating SpMM with Heterogeneous Accelerator ArchitecturesGerasimos Gerogiannis, Sriram Aananthakrishnan, Josep Torrellas, Ibrahim Hur. 1012-1028 [doi]
• SPARK: Scalable and Precision-Aware Acceleration of Neural Networks via Efficient EncodingFangxin Liu, Ning Yang, Haomin Li, Zongwu Wang, Zhuoran Song, Songwen Pei, Li Jiang 0002. 1029-1042 [doi]
• Data Motion Acceleration: Chaining Cross-Domain Multi AcceleratorsShu-Ting Wang, Hanyang Xu, Amin Mamandipoor, Rohan Mahapatra, Byung Hoon Ahn, Soroush Ghodrati, Krishnan Kailas, Mohammad Alian, Hadi Esmaeilzadeh. 1043-1062 [doi]
• RELIEF: Relieving Memory Pressure In SoCs Via Data Movement-Aware Accelerator SchedulingSudhanshu Gupta, Sandhya Dwarkadas. 1063-1079 [doi]
• GRIT: Enhancing Multi-GPU Performance with Fine-Grained Dynamic Page PlacementYueqi Wang, Bingyao Li, Aamer Jaleel, Jun Yang, Xulong Tang. 1080-1094 [doi]
• Guser: A GPGPU Power Stressmark GeneratorYalong Shan, Yongkui Yang, Xuehai Qian, Zhibin Yu 0001. 1111-1124 [doi]
• GPU Scale-Model SimulationHossein SeyyedAghaei, Mahmood Naderan-Tahan, Lieven Eeckhout. 1125-1140 [doi]
• Agile-DRAM: Agile Trade-Offs in Memory Capacity, Latency, and Energy for Data CentersJaeyoon Lee, Wonyeong Jung, Dongwhee Kim, Daero Kim, Junseung Lee, Jungrae Kim. 1141-1153 [doi]
• CHROME: Concurrency-Aware Holistic Cache Management Framework with Online Reinforcement LearningXiaoyang Lu, Hamed Najafi, Jason Liu, Xian-He Sun. 1154-1167 [doi]
• Prosper: Program Stack Persistence in Hybrid Memory SystemsK. P. Arun 0002, Debadatta Mishra, Biswabandan Panda. 1168-1183 [doi]
• Mitigating Write Disturbance in Non-Volatile Memory via Coupling Machine Learning with Out-of-Place UpdatesRonglong Wu, Zhirong Shen, Zhiwei Yang, Jiwu Shu. 1184-1198 [doi]