Abstract is missing.
- Ontological User Modeling for Ambient Assisted Living Service PersonalizationMaurício Fontana de Vargas, Carlos Eduardo Pereira. 3-14 [doi]
- Multi-Agent Based Implementation of an Embedded Image Processing System in FPGA for Precision Agriculture Using UAVsÉrico Nunes, Lucas P. Behnck, Carlos Eduardo Pereira. 15-26 [doi]
- Combining Service-Oriented Computing with Embedded Systems - A Robotics Case StudyAlexander Jungmann, Jan Jatzkowski, Bernd Kleinjohann. 27-37 [doi]
- Integration of Robot Operating System and Ptolemy for Design of Real-Time Multi-robots EnvironmentsLuís Feliphe Silva Costa, Alisson V. Brito, Tiago P. Nascimento, Thiago Henrique Menezes Bezerra. 38-47 [doi]
- Bit-Precise Formal Verification for SystemC Using Satisfiability Modulo Theories SolvingLydia Jaß, Paula Herber. 51-63 [doi]
- Timed Path Conditions in MATLAB/SimulinkMarcus Mikulcak, Paula Herber, Thomas Göthel, Sabine Glesner. 64-76 [doi]
- Structural Contracts - Motivating Contracts to Ensure Extra-Functional SemanticsGregor Nitsche, Ralph Görgen, Kim Grüttner, Wolfgang Nebel. 77-87 [doi]
- Combining an Iterative State-Based Timing Analysis with a Refinement Checking TechniqueTayfun Gezgin, Björn Koopmann, Achim Rettberg. 88-99 [doi]
- Hierarchical Multicore-Scheduling for Virtualization of Dependent Real-Time SystemsJan Jatzkowski, Marcio Kreutz, Achim Rettberg. 103-115 [doi]
- Analysis of Process Traces for Mapping Dynamic KPN Applications to MPSoCsAndrés Goens, Jerónimo Castrillón. 116-127 [doi]
- Modeling and Analysis of SLDL-Captured NoC AbstractionsRan Hao, Nasibeh Teimouri, Kasra Moazzemi, Gunar Schirner. 128-141 [doi]
- Taming the Memory Demand Complexity of Adaptive Vision AlgorithmsMajid Sabbagh, Hamed Tabkhi, Gunar Schirner. 145-158 [doi]
- HMC and DDR Performance Trade-offsPaulo C. Santos, Marco Antonio Zanata Alves, Luigi Carro. 159-171 [doi]
- Managing Cache Memory Resources in Adaptive Many-Core SystemsGustavo Girão, Flávio Rech Wagner. 172-182 [doi]
- A UML Profile to Couple the Production Code Generator TargetLink with UML Design ToolsMalte Falk, Stefan Walter, Achim Rettberg. 185-196 [doi]
- Rapid, High-Level Performance Estimation for DSE Using Calibrated Weight TablesKasra Moazzemi, Smit Patel, Shen Feng, Gunar Schirner. 197-209 [doi]
- Low Latency FPGA Implementation of Izhikevich-Neuron ModelVitor V. Bandeira, Vivianne L. Costa, Guilherme Bontorin, Ricardo A. L. Reis. 210-217 [doi]
- Reconfigurable Buffer Structures for Coarse-Grained Reconfigurable ArraysEricles Rodrigues Sousa, Frank Hannig, Jürgen Teich. 218-229 [doi]