Abstract is missing.
- Reasoning About Digital SystemsAnthony S. Wojcik. 2-6
- Design of a Set Logic Network Based on Frequency Multiplexing and Its Applications to Image ProcessingYasushi Yuminaka, Takafumi Aoki, Tatsuo Higuchi. 8-15
- A Floating-Gate-MOS-Based Multiple-Valued Associative MemoryTakahiro Hanyu, Tatsuo Higuchi. 24-31
- Multiple-Valued Generalized Reed-Muller FormsIngo Schäfer, Marek A. Perkowski. 40-48
- A Non-Commutative Multiple-Valued LogicRobert J. Bignall. 49-54
- On the Complexity of Enumerations for Multiple-Valued Kleenean Functions and Unate FunctionsYutaka Hata, Masaharu Yuhara, Fujio Miyawaki, Kazuharu Yamato. 55-62
- Fundamental Properties of Kleene-Stone Logic FunctionsNoboru Takagi, Masao Mukaidono. 63-70
- A Formal Semantical Approach to Fuzzy LogicLluis Godo, Francesc Esteva, Pere Garcia, Jaume Agustí-Cullell. 72-79
- Topological Soft Algebra for the S5-Modal Fuzzy LogicAkira Nakamura. 80-84
- Worst Case Number of Terms in Symmetric Multiple-Valued FunctionsJon T. Butler, Kriss A. Schueller. 94-101
- Quaternary Cyclic AN Codes for Burst Error CorrectionYoshiteru Okura, Ryosaku Shimada, Toshiharu Hasegawa. 102-109
- On the Maximum Size of the Terms in the Realization of Symmetric FunctionsRatko Tosic, Ivan Stojmenovic, Masahiro Miyakawa. 110-117
- VLSI Fuzzy Chip and Inference Accelerator Board SystemsHiroyuki Watanabe, James R. Symon, Wayne D. Dettloff, Kathy E. Yount. 120-127
- Synthesis of Current-Mode Pass Transistor NetworksOkihiko Ishizuka, Hiroshi Takarabe, Zheng Tang, Hiroki Matsumoto. 139-146
- On the Synthesis of 4-Valued Current Mode CMOS CircuitsKonrad Lei, Zvonko G. Vranesic. 147-155
- Testability Analysis of CMOS Temary CircuitsCome Rozon, H. T. Mouftah. 158-165
- On the Implementation of Set-Valued Non-Boolean Switching FunctionsCorina Reischer, Dan A. Simovici. 166-172
- Design of Interconnection-Free Biomolecular Computing SystemTakafumi Aoki, Michitaka Kameyama, Tatsuo Higuchi. 173-180
- A Decade of Spectral TechniquesClaudio Moraga. 182-188
- Multiple Peak Resonant Tunneling Diode for Multi-Valued MemorySen Jung Wei, Hung Chang Lin. 190-195
- A Bi-Directional Current-Mode CMOS Multiple-Valued Logic Memory CircuitK. Wayne Current, M. E. Hurlston. 196-202
- Theory of Grounded Current Switches and Quatemary IIL CircuitsXunwei Wu, Xiaowei Deng. 210-215
- The Abnormality PredicateEric Neufeld. 218-224
- Improving Tableau Deductions in Multiple-Valued LogicsNeil V. Murray, Erik Rosenthal. 230-237
- Uniform Notation of Tableau Rules for Multiple-Valued LogicsReiner Hähnle. 238-245
- Theory and Uses of Post Algebras of Order /omega+/omega/ast. Part IIGeorge Epstein, Helena Rasiowa. 248-254
- NPN Calculi: A Family of Three Strict Q-AlgebrasWen-Ran Zhang. 255-261
- A Note on Minimal Partial ClonesFerdinand Börner, Lucien Haddad, Reinhard Pöschel. 262-267
- On the Maximum Number of Implicants Needed to Cover a Multiple-Valued Logic Function Using Window LiteralsGerhard W. Dueck, G. H. John van Rees. 280-286
- Parallel Algorithms for Minimizing Multiple-Valued Programmable Logic ArraysParthasarathy P. Tirumalai, Varadarajan G. Vadakkencherry. 287-295
- Post Relation Algebras and Their Proof SystemEwa Orlowska. 298-305
- An Equational Logic Approach for Mapping Multiple-Valued Rule-Based Expert Systems into Hardware Specification RulesDavid C. Rine. 308-315
- A General-Purpose Inference Processor for Real-Time Intelligent Controllers Using Systolic ArraysCaro Lucas, I. Burhan Türksen, Kenneth C. Smith. 316-321
- An Algorithm for the Solution of Multi-Valued Logic ProgrammingYoshifumi Tsuchiya. 322-327
- Multiple-Valued Current-Mode Arithmetic Circuits Based on Redundant Positive-Digit Number RepresentationsShoji Kawahito, K. Mizuno, Tasuro Nakamura. 330-339
- Spectral Techniques for Multiple-Valued Logic CircuitsT. Raju Damarla, Fiaz Hossain. 340-346
- A Fuzzy Logic Function Generator (FLUG) Implemented with Current Mode CMOS CircuitsMamoru Sasaki, Fumio Ueno. 356-362
- An Investigation into the Implementation Costs of Residue and High Radix ArithmeticChyan Yang, Han-Chung Lu, David E. Gilbert. 364-371
- A Comparative Study of Programmable Realization Techniques of Multi-Valued Multi-Threshold FunctionsMostafa H. Abd-El-Barr, H. Choy, A. K. Jain, R. J. Bolton. 372-381