Anthony S. Wojcik - researchr alias

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Viewing Publication 1 - 22 from 22

2001

Efficient Algorithms for Subcircuit Enumeration and Classification for the Module Identification ProblemJennifer L. White, Moon-Jung Chung, Anthony S. Wojcik, Travis E. Doom. iccd 2001: 519-522

2000

Candidate subcircuits for functional module identification in logic circuitsJennifer L. White, Anthony S. Wojcik, Moon-Jung Chung, Travis E. Doom. glvlsi 2000: 34-38 [doi]

1999

An Application of Formal Analysis to Software in a Fault-Tolerant EnvironmentGregory H. Chisholm, Anthony S. Wojcik. TC, 48(10):1053-1064, 1999.

Design Recovery for Incomplete Combinational LogicTravis E. Doom, Anthony S. Wojcik, Moon-Jung Chung. glvlsi 1999: 184-187 [doi]

1998

Identifying High-Level Components in Combinational CircuitsTravis E. Doom, Jennifer L. White, Anthony S. Wojcik, Gregory H. Chisholm. glvlsi 1998: 313-318 [doi]

1991

Reasoning About Digital SystemsAnthony S. Wojcik. ismvl 1991: 2-6

1989

A General, Constructive Approach to Fault-Tolerant Design Using RedundancyAhmed E. Barbour, Anthony S. Wojcik. TC, 38(1):15-29, 1989.

An Automated Reasoning Problem Associated with Proving Claims about Programs Using Floyd-Hoare Inductive Assertin MethodsGregory H. Chisholm, Brian T. Smith, Anthony S. Wojcik. JAR, 5(4):533-540, 1989.

Formal Verification of Fault Tolerance Using Theorem-Proving TechniquesJoseph Kljaich Jr., Brian T. Smith, Anthony S. Wojcik. TC, 38(3):366-376, 1989.

1988

Modular Decomposition of Combinational Multiple-Valued CircuitsKwang-Ya Fang, Anthony S. Wojcik. TC, 37(10):1293-1301, 1988.

1987

A Rule-Based Circuit Representation for Automated CMOS Design and VerificationChing-Farn Eric Wu, Anthony S. Wojcik, Lionel M. Ni. dac 1987: 786-792 [doi]

1986

An Artificial Intelligence Based Implementation of the P-Algorithm for Test GenerationNagendra C. E. Srinivas, Anthony S. Wojcik, Ytzhak H. Levendel. itc 1986: 732-739

1985

Automated Synthesis of Combinational Logic Using Theorem-Proving TechniquesWaldo C. Kabat, Anthony S. Wojcik. TC, 34(7):610-632, 1985.

1984

A formal design verification system based on an automated reasoning systemAnthony S. Wojcik, Joseph Kljaich Jr., Nagendra C. E. Srinivas. dac 1984: 641-647 [doi]

1983

Automated Design of Multiple-Valued Logic Circuits by Automatic Theorem Proving TechniquesWitold S. Wojciechowski, Anthony S. Wojcik. TC, 32(9):785-798, 1983.

Formal design verification of digital systemsAnthony S. Wojcik. dac 1983: 228-234 [doi]

1981

On the Design of 4-Valued Digital SystemsWaldo C. Kabat, Anthony S. Wojcik. TC, 30(9):666-671, 1981.

1980

On the Design of Three-Valued Asynchronous ModulesAnthony S. Wojcik, Kwang-Ya Fang. TC, 29(10):889-898, 1980.

1978

Parallel and serial decompositions of multi-valued sequential machinesT. C. Yang, Anthony S. Wojcik. ismvl 1978: 179-186 [doi]

1974

An Analysis of Some Relationships Between Post and Boolean AlgebrasAnthony S. Wojcik, Gernot Metze. JACM, 21(4):680-696, 1974. [doi]

1971

On the Cost of Base N AddersAnthony S. Wojcik, Gernot Metze. TC, 20(10):1196-1203, 1971. [doi]

Relationships Between Post and Boolean Algebras With Application to Multi-Valued Switching TheoryAnthony S. Wojcik. PhD thesis, University of Illinois Urbana-Champaign, USA, 1971. [doi]

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