Abstract is missing.
- A High-Speed Interconnect Network Using Ternary LogicJens Kargaard Madsen, Stephen I. Long. 2-7 [doi]
- Wire-Free Computing Circuits Using Optical Wave-CastingS. Sakurai, Takafumi Aoki, Tatsuo Higuchi. 8-13 [doi]
- Design of a Highly Parallel Multiple-Valued Linear Digital System for k-Ary Operations Based on Extended Representation MatricesM. Ryu, Michitaka Kameyama. 20 [doi]
- Properties of the Zhang-Watari TransformR. Oenning, Claudio Moraga. 44 [doi]
- Memory Circuits for Multiple-Valued Logic Voltage SignalsK. Wayne Current. 52-57 [doi]
- From Multi-Valued Current Mode CMOS Circuits to Efficient Voltage Mode CMOS Arithmetic OperatorsKeivan Navi, Daniel Etiemble. 58-63 [doi]
- Multiple-Valued Arithmetic Integrated Circuits Based on 1.5V-Supply Dual-Rail Source-Coupled LogicTakahiro Hanyu, Akira Mochizuki, Michitaka Kameyama. 64 [doi]
- Classification of Functions and Enumeration of Bases of Set Logic under Boolean CompositionsAlioune Ngom, Corina Reischer, Ivan Stojmenovic. 78-85 [doi]
- Completeness Theory for Vector Partial Multiple-Valued Logic FunctionsB. A. Romov. 86 [doi]
- Quantum Device Model-Based Super Pass Gate for Multiple-Valued Digital SystemsXiaowei Deng, Takahiro Hanyu, Michitaka Kameyama. 92-97 [doi]
- Random Pattern Fault Simulation in Multi-Valued CircuitsRolf Drechsler, Rolf Krieger, Bernd Becker. 98-103 [doi]
- The Evaluation of Full Sensitivity for Test Generation in MVL CircuitsElena Dubrova, Dilian Gurov, Jon C. Muzio. 104 [doi]
- Novel Quantized Transform for Ternary SystemsBogdan J. Falkowski, Susanto Rahardja. 117-122 [doi]
- A Three-Valued Semantics for Discourse RepresentationsSeiki Akama, Y. Nakayama. 123 [doi]
- Resonant Tunneling Transistor and Its Application to Multiple-Valued Logic CircuitsTakao Waho. 130 [doi]
- On the Mutual Definability of Fuzzy Tolerance Relations and Fuzzy Tolerance CoveringsHelmut Thiele. 140-145 [doi]
- Segment Matrix Vector Quantization and Fuzzy Logic for Isolated-Word Speech RecognitionLiusheng Liu, Zhijian Li, Bingxue Shi. 152 [doi]
- Efficient Algorithm for the Generation of Fixed Polarity Quaternary Reed-Muller ExpansionsBogdan J. Falkowski, Susanto Rahardja. 158-163 [doi]
- Factorization of Multi-Valued Logic FunctionsHui Min Wang, Chung-Len Lee, Jwu E. Chen. 164-169 [doi]
- On Input Permutation Technique for Multiple-Valued Logic SynthesisYutaka Hata, Naotake Kamiura, Kazuharu Yamato. 170 [doi]
- The High-Speed Ternary Logic Gates Based on the Multiple beta TransistorsShoujue Wang, Xunwei Wu, Hongjuan Feng. 178-181 [doi]
- A Fuzzy Membership Function Circuit Using Hysteretic Resonant Tunneling DiodesHao Tang, Hung Chang Lin. 182-186 [doi]
- On Designing of 4-Valued Memory with Double-Gate TFTChung-Len Lee, Horng Nan Chern, Min Shung Liao, Hui Min Wang. 187 [doi]
- Join-Irreducible Clones of Multiple-Valued Logic AlgebraGrant Pogosyan, Akihiro Nozaki. 194-199 [doi]
- Finite Algebraic Models for Residuated LogicWendy MacCaull. 206 [doi]
- Current-Mode CMOS Multiple-Valued Logic Function Realization Using a Direct Cover AlgorithmA. K. Jain, Mostafa H. Abd-El-Barr, R. J. Bolton. 216-221 [doi]
- Race-Hazard and Skip-Hazard in Multivalued Combinational CircuitsXunwei Wu, Xiexiong Chen, Jizhong Shen. 222-227 [doi]
- 2:::k:::-ary Cyclic AN Codes for Burst Error CorrectionR. Murakami, Yoshiteru Ohkura, Ryosaku Shimada. 228 [doi]
- A Characterization of Kleenean FunctionsNoboru Takagi, Hiroaki Kikuchi, Kyoichi Nakashima, Masao Mukaidono. 236-241 [doi]
- Uniqueness of Partially Specified Multiple-Valued Kleenean FunctionHiroaki Kikuchi, Noboru Takagi, Shohachiro Nakanishi, Masao Mukaidono. 242-247 [doi]
- On Logic of ParadoxZuoquan Lin, Wei Li. 248 [doi]
- Decomposition of Multiple-Valued FunctionsTadeusz Luba. 256 [doi]
- Learning Multiple-Valued Logic Networks Based on Back PropagationZheng Tang, Okihiko Ishizuka, Koichi Tanno. 270-275 [doi]
- Three-Valued Constructive Logic and Logic ProgramsSeiki Akama. 276 [doi]
- Functional Decision Diagrams for Multiple-Valued FunctionsRadomir S. Stankovic. 284-189 [doi]
- Multiple-Valued Logic Design Using Multiple-Valued EXORTakahiro Hozumi, Naotake Kamiura, Yutaka Hata, Kazuharu Yamato. 290-295 [doi]