Table of Contents

• A Self Oscillating Current-Reuse Image Reject Mixer for Ultra Low Power ReceiversAbhilash Reddy Yedala, Sankaran Aniruddhan. 1-4 [doi]
• On the Bode Diagram Plot of Switched Converters Using MATLAB Simulink - a Tutorial ApproachDaniel M. Barrera Leguizamón, Robert Urbina, Carlos Páez, Arturo Fajardo, Gabriel Perilla. 1-4 [doi]
• Stacked-Cascode Current Steering Architecture for Gallium Nitride Variable-Gain LNAsJorge Luis González Rios, Diego Vázquez, Robson Luiz Moreno, Juan Carlos Merlano Duncan, Ole K. Jensen, Symeon Chatzinotas, Björn E. Ottersten. 1-4 [doi]
• Error Resilience Evaluation of Approximate Storage in the Motion Compensation of VVC DecodersRenira Soares, Matheus Isquierdo, Felipe Sampaio, Amir Rahmani, Nikil D. Dutt, Guilherme Corrêa 0001, Daniel Palomino 0001, Bruno Zatt. 1-4 [doi]
• Using Lyapunov Exponents to Estimate Sensitivity to Process VariabilityElias de Almeida Ramos, Ricardo Reis 0001. 1-4 [doi]
• Thermal Energy Harvesting to Power a Battery-Less Node of a Wireless Sensor NetworkSofía Boselli, Romina Gaudio, María Pía Grilli, Fernando Silveira, Mariana Siniscalchi. 1-4 [doi]
• Hardware Design for the Affine Motion Compensation of the VVC StandardMarcello M. Muñoz, Denis Maass, Murilo R. Perleberg, Luciano Agostini, Marcelo Schiavon Porto. 1-4 [doi]
• Analysis and Design of a Self-Powered VEH System Based on ULP ComparatorEduardo Holguin, Luis-Miguel Prócel, Alexis Brenes, Andrei Vladimirescu, Lionel Trojman. 1-4 [doi]
• Design and Evaluation of Inexact Computation based Systolic Array for ConvolutionSai Karthik Nandigama, Prashanth H. C., Madhav Rao. 1-4 [doi]
• An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider UnitsMorgana M. A. da Rosa, Patrícia U. L. da Costa, Guilherme Paim, Eduardo A. C. da Costa, Rafael Soares, Sergio Bampi. 1-4 [doi]
• Performance Benchmarking of FinFET- and TFET-Based STT-MRAM Bitcells Operating at Ultra-Low VoltagesSantiago S. Pérez, Alessandro Bedoya, Luis-Miguel Prócel, Ramiro Taco. 1-4 [doi]
• Deep Learning-Based Receiver Energy Prediction in Energy Harvesting Wireless Sensor NetworkEl-hadi Zazoua, Wessam Ajib, Mounir Boukadoum. 1-5 [doi]
• Exploring Multi-Parameter Optimization of Automated HLS Tools and the Difficulty of Setting Complex ConstraintsNoam Shalom, Itamar Levi. 1-4 [doi]
• DNAr-Analog: A Library With a Multiplexer to Easily Design, Program, and Simulate Dsd Analog CircuitsPoliana A. C. Oliveira, Renan A. Marks, João V. C. Teixeira, Marcos V. Guterres, Omar P. Vilela Neto. 1-4 [doi]
• An RF-EH Employing Controlled-Impedance Matching for Ultra-Low Voltage Batteryless DevicesTailize C. De-Oliveira, Raul P. De Oliveira, Alessandro Gonçalves Girardi, Paulo César Comassetto de Aguirre, Lucas Compassi Severo. 1-4 [doi]
• Security Implications of Decoupling Capacitors on Leakage Reduction in Hardware MaskingSoner Seçkiner, Selçuk Köse. 1-4 [doi]
• Voltage Regulation in a Buck Converter for an Unknown CPL: An Extended Feedback Control DesignFederico Martin Serra, W. Gil-Gonzalez, Oscar D. Montoya, Jesús C. Hernández. 1-4 [doi]
• Design of Quasi Delay Insensitive Combinational Circuits Based on Optimized DIMSDuarte Lopes de Oliveira, Marcus H. Victor, Luiz C. Moreira, Felipe F. Nascimento. 1-4 [doi]
• Novel measurement method to estimate the main resonance of a Power Distribution NetworkMarie Peyrard, Gilles Jacquemod, Nicolas Froidevaux, Mélanie Moign. 1-4 [doi]
• Multi-Size Inverse DCT-II Hardware Design for the VVC DecoderBruna Garcia, Bianca Silveira, Cláudio Machado Diniz, Daniel Palomino 0001, Guilherme Corrêa 0001. 1-4 [doi]
• Neutron Irradiation of Si-PIN Diodes and Laser Injection EquivalenceRicardo Ascázubi, F. Rogelio Palomo, Victoria Navarrete-Larive, Jose Manuel Quesada Molina, Miguel Antonio Cortes-Giraldo, Jose Antonio Pavón-Rodriguez. 1-4 [doi]
• High-Throughput and Multiplierless Hardware Design for the AV1 Fractional Motion EstimationRobson Domanski, William Kolodziejski, Wagner Penny, Marcelo Schiavon Porto, Bruno Zatt, Luciano Agostini. 1-4 [doi]
• Minimizing Power Consumption Through Brute Force Algorithm in Elastic Optical NetworkSabi Y. M. Bandiri, Souleymane Diakite, Max Frejus O. Sanya, Francisco A. B. Souza Filho, Herman S. S. L. Pereira, Tales C. Pimenta. 1-4 [doi]
• Analysis of AV1 Arithmetic Decoder Design Space with a Novel Multi-Boolean ApproachJiovana Sousa Gomes, Tulio Pereira Bitencourt, Sergio Bampi, Fábio Luís Livi Ramos. 1-4 [doi]
• A Fast Cold-Start Integrated System for Ultra-Low Voltage SC Energy-Harvesting CircuitsLuis Felipe Machado Dutra, Paulo César Comassetto de Aguirre, Alessandro Gonçalves Girardi, Lucas Compassi Severo. 1-4 [doi]
• Efficient Architecture for VVC Angular Intra Prediction based on a Hardware-Friendly HeuristicVinicius A. Borges, Murilo R. Perleberg, Marcelo Schiavon Porto, Luciano Agostini. 1-4 [doi]
• Compact Time-Based Sensor-to-Digital Converters in Skywater 130nm Open-Source TechnologyJorge Marin, Ioannis Vourkas, Christian A. Rojas, Joel Gak. 1-4 [doi]
• Programmable Seizure Detector Using a 32-bit RISC Processor for Implantable Medical DevicesKeyvan Farhang Razi, Alexandre Schmid. 1-4 [doi]
• Design of an ECG front-end considering ST segment distortionBéatrice Guénégo, Caroline Lelandais-Perrault, Emilie Avignon-Meseldzija, Gérard Sou, Philippe Bénabès. 1-4 [doi]
• Extended Feedback Linearization Control for Voltage Regulation in a Buck Converter with an Unknown Resistive LoadOscar D. Montoya, W. Gil-Gonzalez, Federico Martin Serra, Cristian H. De Angelo, Jesús C. Hernández. 1-4 [doi]
• Active inductors modelling and trade-offs reexaminedAndrés Seré, Leonardo Barboni, Sylvain Bourdel, Fernando Silveira. 1-4 [doi]
• Accelerated Hot-Carrier Aging Based on Ultrafast Laser for CMOS TechnologiesRicardo Ascazubi, Bahar Ajdari, Curtis Shirota. 1-3 [doi]
• Concise Memory Organization for a Customizable Hardware Design of a Quantum CoprocessorNadia Nedjah, Sérgio de Souza Raposo, Luiza de Macedo Mourelle. 1-4 [doi]
• A Radiation Hardened Smart Power Switch Based on SOI TechnologyRonald H. G. Chacón, Eduardo Galera de Carvalho, Jair L. de Emeri, Ângela A. dos Santos, Paula C. Secheusk, José A. Diniz, Saulo Finco. 1-4 [doi]
• A low-complexity experimental characterization of the neodymium magnet gradeLuis Barón, Robert Urbina, Manuel Pérez, Carlos-Ivan Paez-Rueda, Arturo Fajardo. 1-4 [doi]
• Pico-Ampere Current Biasing Platform for on-chip Tuning of Analog BlocksGerman Fierro, Fernando Silveira. 1-4 [doi]
• High-Speed Sampler for UWB Breast Cancer Detection SystemLucas Martins M. De Almeida, Bruno Sanches, Wilhelmus Adrianus Maria Van Noije. 1-4 [doi]
• Self-Calibrating Circuit for Implantable Current StimulatorsNatalia Martínez, Matías R. Miguez, Juan Sapriza, Joel Gak, Alfredo Arnaud. 1-4 [doi]
• Design-oriented model for short-channel MOS transistors based on inversion chargeDayana A. Pino-Monroy, Patrick Scheer, Mohamed Khalil Bouchoucha, Carlos Galup-Montoro, Manuel J. Barragan, Jean-Michel Fournier, Andreia Cathelin, Sylvain Bourdel. 1-4 [doi]
• A Compact Analogue Counter for Single Photon ImagersSoumya Shatakshi Panda, Bhaskar Choubey. 1-4 [doi]
• STT-MRAM Technology For Energy-Efficient Cryogenic Memory ApplicationsEsteban Garzón, Leonid Yavits, Adam Teman, Marco Lanuzza. 1-4 [doi]
• Complexity and Coding Efficiency Assessment of AOMedia Video 1Ícaro Siqueira, Guilherme Corrêa 0001, Mateus Grellert. 1-4 [doi]
• A Wide-Band High-Speed Sample and Hold in 0.35µm CMOS TechnologyMateus Bernardino Moreira, Hervé Lapuyade, François Rivet, Yann Deval. 1-4 [doi]
• Quantitative Information Flow for Hardware: Advancing the Attack LandscapeLennart M. Reimann, Sarp Erdönmez, Dominik Sisejkovic, Rainer Leupers. 1-4 [doi]
• Parkinson's Treatment Emulation Using Asynchronous Cellular Neural NetworksIoannis K. Chatzipaschalis, Karolos-Alexandros Tsakalos, Georgios Ch. Sirakoulis, Antonio Rubio. 1-4 [doi]
• Overview of Cryogenic Operation in Nanoscale Technology NodesNoam Roknian, Yonatan Shoshan, Inbal Stanger, Adam Teman, Edoardo Charbon, Alexander Fish. 1-4 [doi]
• Design and evaluation of CNN hardware accelerator designs for in-seat passenger anomaly detectionAvik Bhatnagar, Pratyush Nandi, Madhav Rao. 1-4 [doi]
• The Fault-tolerant Single-FPGA Systems with a Self-repair Reconfiguration ControllerRichard Panek, Jakub Lojda. 1-4 [doi]