Abstract is missing.
- Systems-on-chip needs for embedded software development: an industrial perspectivePhilippe Magarshack. 1 [doi]
- Energy-conscious compilation based on voltage scalingHendra Saputra, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jie S. Hu, Chung-Hsing Hsu, Ulrich Kremer. 2-11 [doi]
- Fractional rate dataflow model and efficient code synthesis for multimedia applicationsHyunok Oh, Soonhoi Ha. 12-17 [doi]
- Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulationSumit Mohanty, Viktor K. Prasanna, Sandeep Neema, James R. Davis. 18-27 [doi]
- Design space optimization of embedded memory systems via data remappingKrishna V. Palem, Rodric M. Rabbah, Vincent John Mooney, Pinar Korkmaz, Kiran Puttaswamy. 28-37 [doi]
- Footprint and feature management using aspect-oriented programming techniquesFrank Hunleth, Ron Cytron. 38-45 [doi]
- Generic control flow reconstruction from assembly codeDaniel Kästner, Stephan Wilhelm. 46-55 [doi]
- Profile guided selection of ARM and thumb instructionsArvind Krishnaswamy, Rajiv Gupta. 56-64 [doi]
- Standardization approach of ITRON debugging interface specification and evaluation of its adaptabilityTakayuki Wakabayashi, Hiroaki Takada. 65-74 [doi]
- On systematic design of globally consistent executable assertions in embedded softwareArshad Jhumka, Martin Hiller, Vilgot Claesson, Neeraj Suri. 75-84 [doi]
- Automatic formal verification for scheduled VLIW codeXiushan Feng, Alan J. Hu. 85-92 [doi]
- DSPs: why don t they just go away!Gerhard Fettweis. 93-93 [doi]
- Energy aware compilation for DSPs with SIMD instructionsMarkus Lorenz, Lars Wehmeyer, Thorsten Dräger. 94-101 [doi]
- Optimal integrated code generation for clustered VLIW architecturesChristoph W. Keßler, Andrzej Bednarski. 102-111 [doi]
- Loop fusion for clustered VLIW architecturesYi Qian, Steve Carr, Philip H. Sweany. 112-119 [doi]
- Compiling with code-size constraintsMayur Naik, Jens Palsberg. 120-129 [doi]
- Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithmsJeonghun Cho, Yunheung Paek, David B. Whalley. 130-138 [doi]
- Register allocation for irregular architecturesBernhard Scholz, Erik Eckstein. 139-148 [doi]
- Inter-task register-allocation for static operating systemsVolker Barthelmann. 149-154 [doi]
- VISTA: a system for interactive code improvementWankang Zhao, Baosheng Cai, David B. Whalley, Mark W. Bailey, Robert van Engelen, Xin Yuan, Jason Hiser, Jack W. Davidson, Kyle Gallivan, Douglas L. Jones. 155-164 [doi]
- Compiler-directed cache polymorphismJie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang 0002. 165-174 [doi]
- ::::Quick piping: :::: a fast, high-level model for describing processor pipelinesChristopher W. Milner, Jack W. Davidson. 175-184 [doi]
- Application specific compiler/architecture codesign: a case studyOliver Wahlen, Tilman Glökler, Achim Nohl, Andreas Hoffmann, Rainer Leupers, Heinrich Meyr. 185-193 [doi]
- When to use a compilation service?Jeffrey Palm, Han Bok Lee, Amer Diwan, J. Eliot B. Moss. 194-203 [doi]
- Proxy compilation of dynamically loaded Java classes with MoJoMatt Newsome, Des Watson. 204-212 [doi]
- Energy-conserving feedback EDF scheduling for embedded systems with real-time constraintsAjay Dudani, Frank Mueller, Yifan Zhu. 213-222 [doi]
- Perfecting preemption threshold scheduling for object-oriented real-time system design: from the perspective of real-time synchronizationSaehwa Kim, Seongsoo Hong, Tae Hyung Kim. 223-232 [doi]