Table of Contents

• A survey of main dataflow MoCCs for CPS design and verificationGuillaume Roumage, Selma Azaiez, Stéphane Louise. 1-9 [doi]
• Evaluating the Optimal Self-Checking Carry Propagate Adder for Cryptographic ProcessorMuhammad Ali Akbar, Bo Wang 0012, Amine Bermak. 10-13 [doi]
• Scalability of Post-Silicon Test Generation for Multi-core RISC-V SOC ValidationSih Pin Tan, Yung It Ho. 14-17 [doi]
• Buffer Allocation for Exposed Datapath ArchitecturesAnoop Bhagyanath, Klaus Schneider 0001. 18-25 [doi]
• Movie Oriented Positive Negative Emotion Classification from EEG Signal using Wavelet transformation and Machine learning ApproachesAbu Saleh Musa Miah, Jungpil Shin, Md. Al Mehedi Hasan, Md. Khademul Islam Molla, Yuichi Okuyama, Yoichi Tomioka. 26-31 [doi]
• Design of Reward Functions for RL-based High-Speed Autonomous DrivingTanaka Kohsuke, Yuta Shintomi, Yuichi Okuyama, Taro Suzuki. 32-37 [doi]
• A Lightweight End-to-end Network for Wearing Mask Recognition on Low-resolution ImagesMenglei Li, Hongbo Chen, Zixue Cheng. 38-44 [doi]
• A Message Passing Interface Library for High-Level Synthesis on Multi-FPGA SystemsKazuei Hironaka, Kensuke Iizuka, Hideharu Amano. 45-52 [doi]
• A Spintronics-Based Nonvolatile FPGA and Its Application to Edge-AI AcceleratorDaisuke Suzuki, Takahiro Hanyu. 53-60 [doi]
• Acceleration of DNN-based Hand Pose Estimation with Monocular Camera Using TVMToshihiro Uetsuki, Yohei Shimmyo, Yuichi Okuyama, Yoichi Tomioka, Jungpil Shin. 61-66 [doi]
• Automatic endometrial segmentation in ultrasound images using deep learningYiyang Liu, Boyuan Peng, Xin Zhu 0001, Wenwen Wang, Qin Zhou, Shixuan Wang, Jingjing Jiang, Li Fang. 67-71 [doi]
• Fake Image Detection Using An Ensemble of CNN Models Specialized For Individual Face PartsAkihisa Kawabe, Ryuto Haga, Yoichi Tomioka, Yuichi Okuyama, Jungpil Shin. 72-77 [doi]
• Evaluation of Different Microarchitectures for Energy-Efficient RISC-V CoresJunichiro Kadomoto, Hidetsugu Irie, Shuichi Sakai. 78-84 [doi]
• Packed SIMD Vectorization of the DRAGON2-CBRiadh Ben Abdelhamid, Yoshiki Yamaguchi. 85-92 [doi]
• Exploring the Potential of Error-permissive Communication in Multi-FPGA-based Edge ComputingAkram Ben Ahmed, Ryousei Takano, Takahiro Hirofuchi. 93-97 [doi]
• Cluster Based Smart Random Walk for Data Aggregation in Wireless Sensor NetworkManish Kumar Maurya, Anubhav Shivhare, Aadil Ali, Satakshi, Ashutosh Mishra, Manish Kumar 0001. 98-104 [doi]
• Radar and Camera Fusion for Object Forecasting in Driving ScenariosAlbert Budi Christian, Yu-Hsuan Wu, Chih-Yu Lin, Lan-Da Van, Yu-Chee Tseng. 105-111 [doi]
• Distributed Decision Fusion for Large Scale IoT- EcosystemAshwin Raut, Divesh Kumar, Vijay Kumar Chaurasiya, Manish Kumar 0001. 112-119 [doi]
• Online Image Sensor Fault Detection for Autonomous VehiclesYizhi Chen, Wenyao Zhu, De-Jiu Chen, Zhonghai Lu. 120-127 [doi]
• Systolic Array Based Convolutional Neural Network Inference on FPGAShi Hui Chua, T. Hui Teo, Mulat Ayinet Tiruye, I-Chyn Wey. 128-133 [doi]
• Composite Lightweight Authenticated Encryption Based on LED Block Cipher and PHOTON Hash Function for IoT DevicesMohammed Omar Awadh Al-Shatari, Fawnizu Azmadi Hussin, Azrina Abd Aziz, Mohd Saufy Rohmad, Xuan-Tu Tran. 134-139 [doi]
• High-Performance Asynchronous CNN Accelerator with Early TerminationTan Rong Loo, T. Hui Teo, Mulat Ayinet Tiruye, I-Chyn Wey. 140-144 [doi]
• Design and implementation of vehicle oil online information monitoring systemZhenbin Lv, Xin Wang, Haifeng Zhi, Bo Lin, Yitao Shen, Yanyan Wang, Chenxu Wang. 145-152 [doi]
• A Charge-Digital Hybrid Compute-In-Memory Macro with full precision 8-bit Multiply-Accumulation for Edge Computing DevicesJinwu Chen, Tianzhu Xiong, Xin Si. 153-158 [doi]
• A 94.5% Peak Efficiency, 14mV Output Ripple SC-Buck Step-Up Converter with 1.2-to-5V Output Achieving 20.2% Enhanced Power Efficiency in New PMU Architecture for SoCsZhuoqi Guo, Yongchao Zhang, Meiling Hu, Zhongming Xue, Li Geng. 159-166 [doi]
• Driver Status Monitoring System with Feedback from Fatigue Detection and Lane Line DetectionKai Yan, Chaoyue Zhao, Chengkang Shen, Peiyan Wang, Guoqing Wang. 167-173 [doi]
• Hardware Implementation of an Automatic Color Equalization Algorithm for Real-time Image EnhancementXiang-yu Chen, Yu-Hsiang Wang, Yao-Song Zhang, Yen-Jui Chen, Shiann-Rong Kuang. 174-179 [doi]
• Exploration of an Enhanced Scheduling Approach with Feasibility Analysis on a Single CPU SystemVijayalakshmi Saravanan, Gang Wan, Anju S. Pillai. 180-186 [doi]
• Efficient and High-Performance Sparse Matrix-Vector Multiplication on a Many-Core ArrayPeiyao Shi, Aaron Stillmaker, Bevan M. Baas. 187-194 [doi]
• FPGA-Based Prototype of a Quantum Annealing Simulator for Sparse Ising ModelHasitha Muthumala Waidyasooriya, Yuta Ohma, Masanori Hariyama. 195-199 [doi]
• Using scheduling entropy amplification in CUDA/OpenMP code to exhibit non-reproducibility issuesDavid Defour. 200-207 [doi]
• Autotuning Power Consumption and Computation Accuracy using ppOpen-ATShouhei Yamanashi, Hisashi Yashiro, Takahiro Katagiri, Toru Nagai, Satoshi Ohshima. 208-215 [doi]
• Digital Computation-in-Memory Design with Adaptive Floating Point for Deep Neural NetworksYun-Ru Yang, Wei Lu, Po-Tsang Huang, Hung-Ming Chen. 216-223 [doi]
• Hardware characterization of Integer-Net based seizure detection models on FPGASoujanya S. R, Madhav Rao. 224-231 [doi]
• Cognitive Bus Coding Scheme for Inter-Chip Communications of Deep Learning Accelerator Chiplet on Low-cost Si and Glass InterposerYu-Hong Chang, Tourangbam Harishore Singh, Po-Tsang Huang. 232-238 [doi]
• Accelerating Non-Negative Matrix Factorization on Embedded FPGA with Hybrid Logarithmic Dot-Product ApproximationYizhi Chen, Yarib Nevarez, Zhonghai Lu, Alberto García Ortiz. 239-246 [doi]
• A systematic review of machine learning techniques in online learning platformsCyril Elorm Kodjo Agbewali-Koku, Md. Atiqur Rahman, Mohamed Hamada 0001, Mohammad Ameer Ali, Lutfun Nahar Oysharja, Md Tazmim Hossain. 247-250 [doi]
• Network Intrusion Detection System Using Deep Learning Method with KDD Cup'99 DatasetJesse Jeremiah Tanimu, Mohamed Hamada 0001, Patience Robert, Anand Mahendran. 251-255 [doi]
• Algorithm to Interconvert SQL and Procedural Visual QueriesTomonori Suzuki, Yutaka Watanobe, Divij G. Singh. 256-263 [doi]
• Making Software Based on Human-Driven Design Case Study: SQL for non-expertsHida Masataka, Yutaka Watanobe. 264-270 [doi]
• Impact of Programming Language Skills in Programming LearningMd. Faizul Ibne Amin, Md. Mostafizer Rahman, Yutaka Watanobe, Muepu Mukendi Daniel. 271-277 [doi]
• Design and FPGA Implementation of Lite Convolutional Neural Network Based Hardware Accelerator for Ocular Biometrics Recognition TechnologyWei-Che Sun, Chih-Peng Fan, Chung-Bin Wu. 278-283 [doi]
• Critical Signature Assertion and On-the-Fly Recovery for Control Flow Errors in ProcessorsIng-Jer Huang, Yi-Ju Ke, Shih-Jung Pao. 284-290 [doi]
• Toward EEG-Based Brain State Recognition for Personalized NeuromodulationYu-Cheng Chang, Pin-Hsuan Chao, Sin-Horng Chen, Chun-Shu Wei. 291-296 [doi]
• Neuronal population biomarkers of temporal difference learning in human impulsive choicesRhiannon L. Cowan, Tyler S. Davis, Bornali Kundu, John D. Rolston, Elliot H. Smith. 297-300 [doi]
• Design and Analysis of A Dual-Band Bistatic Backscatter Circuit for Passive RFID TagsNasir Abdul Quadir, Maher Hamdi, Muhammad Asfandyar Awan, Bo Wang 0012, Amine Bermak. 301-304 [doi]
• A Run-time Tapered Floating-Point Adder/Subtractor Supporting VectorizationAshish Reddy Bommana, Srinivas Boppu. 305-312 [doi]
• A Hybrid Opto-Electrical Floating-point MultiplierTakumi Inaba, Takatsugu Ono, Koji Inoue, Satoshi Kawakami. 313-320 [doi]
• Design and Analysis of a Nano-photonic Processing Unit for Low-Latency Recurrent Neural Network ApplicationsEito Sato, Koji Inoue, Satoshi Kawakami. 321-329 [doi]
• Complex Human Activities Recognition Based on High Performance 1D CNN ModelRaman Maurya, T. Hui Teo, Shi Hui Chua, Hwang-Cherng Chow, I-Chyn Wey. 330-336 [doi]
• Implementation of Edge-cloud Cooperative CNN Inference on an IoT PlatformYuan Wang, Hidetomo Shibamura, KuanYi Ng, Koji Inoue. 337-344 [doi]
• Turn-aware Application Mapping using Reinforcement Learning in Power Gating-enabled Network on ChipMohammadmehdi Shammasi, Mohammad Baharloo, Meisam Abdollahi, Amirali Baniasadi. 345-352 [doi]
• Intelligent congestion control for NoC architecture in Gem5 simulatorSmriti Srivastava, Mushtaq Ahmed Shaikh, Shivaneetha G, Minal Moharir. 353-360 [doi]
• Distance Aware Compression for Low Latency High Bandwidth Interconnection NetworkZhou Yuqing, Naoya Niwa, Hideharu Amano. 361-367 [doi]
• A Reconfigurable Design of Flexible-arbitrated Crossbar Interconnects in Multi-core SoC systemXuewen He, Yajie Wu, Yichuan Bai, Jie Liu, Li Du, Yuan Du. 368-374 [doi]
• A Realization of IO Physical Memory Protection for RISC-V SystemsJien Hau Ng, Chee Hong Ang, Hwa Chaw Law. 375-380 [doi]
• Parameterizable mobile workloads for adaptable base station optimizationsJulian Robledo, Jerónimo Castrillón. 381-386 [doi]
• Efficient Hardware Architecture for Posit Addition/SubtractionSusheel Ujwal Siddamshetty, Srinivas Boppu, Debapratim Ghosh. 387-394 [doi]
• Traffic-Aware Energy-Efficient Hybrid Input Buffer Design for On-Chip RoutersYujie Gao, Yuan He 0002, Xiaohan Yue, Haiyan Jiang, Xibo Wang. 395-401 [doi]