Abstract is missing.
- A compact model of stochastic switching in STT magnetic RAM for memory and computingRoberto Carboni, E. Vernocchi, M. Siddik, J. Harms, A. Lyle, G. Sandhu, Daniele Ielmini. 1-6 [doi]
- Spintronic Memories: From Memory to Computing-in-MemoryWang Kang, He Zhang, Weisheng Zhao. 1-2 [doi]
- Design and Analysis of Majority Logic Based Approximate Radix-4 Booth EncodersTingting Zhang, Weiqiang Liu, Jie Han 0001, Fabrizio Lombardi. 1-6 [doi]
- A Logic Simplification Approach for Very Large Scale Crosstalk Circuit DesignsMd Arif Iqbal, Naveen Kumar Macha, Bhavana Tejaswini Repalle, Mostafizur Rahman. 1-6 [doi]
- Experimental Investigation of Memristance EnhancementVasileios G. Ntinas, Antonio Rubio, Georgios Ch. Sirakoulis, Rosana Rodríguez, Montserrat Nafría. 1-2 [doi]
- REAL: Logic and Arithmetic Operations Embedded in RRAM for General-Purpose ComputingLei Xie, Hao Cai, Jun Yang. 1-4 [doi]
- Enabling New Computing Paradigms with Emerging Symmetric-Access MemoriesJuejian Wu, Mingyang Gu, Hongtao Zhong, Yunsong Tao, Fei Qiao, Huazhong Yang, Xueqing Li. 1-6 [doi]
- A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield ImprovementYongliang Zhou, Menglin Han, Mingyue Liu, Hao Cai, Bo Liu, Jun Yang. 1-6 [doi]
- Graphene Nanoribbon-based Synapses with Versatile PlasticityH. Wang, Nicoleta Cucu Laurenciu, Y. Jiang, Sorin Dan Cotofana. 1-6 [doi]
- ynamic Adaptation of Approximate Bit-width for CNNs based on Quantitative Error ResilienceChengjun Wu, Weiwei Shan, Jiaming Xu. 1-6 [doi]
- Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAMMingyue Liu, Hao Cai, Menglin Han, Lei Xie, Jun Yang, Lirida A. B. Naviner. 1-6 [doi]
- Detecting and Bypassing Trivial Computations in Convolutional Neural NetworksDongning Ma, Xun Jiao. 1-6 [doi]
- Non-volatile Logic and Memory based on Reconfigurable Ferroelectric TransistorsSandeep Krishna Thirumala, Arnab Raha, Vijaykrishnan Narayanan, Vijay Raghunathan, Sumeet Kumar Gupta. 1-6 [doi]
- Clifford Gate Optimisation and T Gate Scheduling: Using Queueing Models for Topological AssembliesAlexandru Paler, Robert Basmadjian. 1-5 [doi]
- Thermal Stable and Fast Perpendicular Shape Anisotropy Magnetic Tunnel JunctionGuanda Wang, Yue Zhang, Zhe Huang, Jinkai Wang, Kun Zhang, Zhizhong Zhang, Youguang Zhang, Weisheng Zhao. 1-6 [doi]
- Low-Power, High-Speed and High-Density Magnetic Non-Volatile SRAM Design with Voltage-Gated Spin-Orbit TorqueChengzhi Wang, Deming Zhang, Lang Zeng, Kaili Zhang, Youguang Zhang, Weisheng Zhao. 1-6 [doi]
- A Novel Memristor-Reusable Mapping Methodology of In-memory Logic Implementation for High Area-EfficiencyYongjie Lu, Yanan Sun, Weifeng He, Zhigang Mao. 1-6 [doi]
- An Energy-Efficient Architecture for Accelerating Inference of Memory-Augmented Neural NetworksJianxun Yang, Leibo Liu, Jin Zhang, Shaojun Wei, Shouyi Yin. 1-6 [doi]
- ResNet Can Be Pruned 60×: Introducing Network Purification and Unused Path Removal (P-RM) after Weight PruningXiaolong Ma, Geng Yuan, Sheng Lin, Zhengang Li, Hao Sun, Yanzhi Wang. 1-2 [doi]
- Enhanced Scouting Logic: A Robust Memristive Logic Design SchemeJintao Yu, Hoang Anh Du Nguyen, Muath Abu Lebdeh, Mottaqiallah Taouil, Said Hamdioui. 1-6 [doi]
- Implementing Binarized Neural Networks with Magnetoresistive RAM without Error CorrectionTifenn Hirtzlin, Bogdan Penkovsky, Jacques-Olivier Klein, Nicolas Locatelli, Adrien F. Vincent, Marc Bocquet, Jean Michel Portal, Damien Querlioz. 1-5 [doi]
- High speed and reliable Sensing Scheme with Three Voltages for STT-MRAMJinkai Wang, Yue Zhang, Chenyu Lian, Guanda Wang, Kun Zhang, Xiulong Wu, Youguang Zhang, Weisheng Zhao. 1-6 [doi]
- Technology-Assisted Computing-In-Memory Design for Matrix Multiplication WorkloadsNicholas Jao, Srivatsa Srivinasa, Akshay Krishna Ramanathan, Minhwan Kim, John Sampson, Vijaykrishnan Narayanan. 1-6 [doi]
- Deep Neural Network Acceleration in Non-Volatile Memory: A Digital ApproachShaahin Angizi, Deliang Fan. 1-6 [doi]
- Effect of Lattice Defects on the Transport Properties of Graphene NanoribbonKonstantinos Rallis, Panagiotis Dimitrakis, Georgios Ch. Sirakoulis, Ioannis Karafyllidis, Antonio Rubio. 1-2 [doi]
- Shaped Content Addressable Memory Based On Spin Orbit Torque Driven Chiral Domain Wall MotionsYue Zhang 0010, Jiang Nan, Guanda Wang, Xueying Zhang, Youguang Zhang, Weisheng Zhao. 1-2 [doi]
- ComPRIMe: A Compiler for Parallel and Scalable ReRAM-based In-Memory ComputingSteffen Frerix, Saeideh Shirinzadeh, Saman Fröhlich, Rolf Drechsler. 1-6 [doi]
- Plasma Modified Silicon Nitride Resistive Switching MemoriesP. Karakolis, P. Normand, Panagiotis Dimitrakis, L. Sygelou, Vasileios G. Ntinas, Iosif-Angelos Fyrigos, Ioannis Karafyllidis, George Ch. Sirakoulis. 1-2 [doi]
- An Energy-Efficient In-Memory BNN Architecture With Time-Domain Analog and Digital Mixed-Signal ProcessingTao Wang, Weiwei Shan. 1-6 [doi]
- Process Variation-Resilient STT-MTJ based TRNG using Linear Correcting CodesRashid Ali, You Wang, Zhengyi Hou, Haoyuan Ma, Youguang Zhang, Weisheng Zhao. 1-6 [doi]
- Novel 3D architecture of 1S1RBehnoush Attarimashalkoubeh, Yusuf Leblebici. 1-2 [doi]