Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder

Manish Kumar Jaiswal, Ray C. C. Cheung, M. Balakrishnan, Kolin Paul. Unified Architecture for Double/Two-Parallel Single Precision Floating Point Adder. IEEE Trans. on Circuits and Systems, 61-II(7):521-525, 2014. [doi]

Abstract

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