Anurag Mahajan - researchr alias

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Viewing Publication 1 - 13 from 13

2024

An error-efficient Gaussian filter for image processing by using the expanded operand decomposition logarithm multiplicationDurgesh Nandan, Jitendra Kanungo, Anurag Mahajan. jaihc, 15(1):1045-1052, January 2024. [doi]

2023

Expert System for Real Time Arm Movement Recognition Based on Surface EMG SignalShripad Bhatlawande, Swati Shilaskar, Mahesh Kinge, Anurag Mahajan. iccids 2023: 11-24 [doi]

Automatic Liver Cancer Detection Using Deep Convolution Neural NetworkKiran Malhari Napte, Anurag Mahajan, Shabana Urooj. access, 11:94852-94862, 2023. [doi]

2021

Polycystic Ovarian Syndrome Detection by Using Two-Stage Image DenoisingShruti Bhargava Choubey, Abhishek Choubey, Durgesh Nandan, Anurag Mahajan. tds, 38(4):1217-1227, 2021. [doi]

Area-delay efficient Radix-4 8×8 Booth multiplier for DSP applicationsSubodh Kumar Singhal, Sujit Kumar Patel, Anurag Mahajan, Gaurav Saxena. elektrik, 29(4):2012-2028, 2021. [doi]

2019

Analytical modelling and experimental study of machining of smart materials using submerged abrasive waterjet micromachining processAnurag Mahajan, Sagil James. ijmr, 14(3):278-294, 2019. [doi]

Area-Delay Efficient and Low-Power Carry Skip Adder for High Performance Computing SystemsSujit Kumar Patel, Bharat Garg, Anurag Mahajan, Shireesh Kumar Rai. ifip5-5 2019: 300-303 [doi]

2017

An efficient VLSI architecture design for logarithmic multiplication by using the improved operand decompositionDurgesh Nandan, Jitendra Kanungo, Anurag Mahajan. integration, 58:134-141, 2017. [doi]

2013

Efficient-Block-Processing Parallel Architecture for Multilevel Lifting 2-D DWTBasant K. Mohanty, Anurag Mahajan. jolpe, 9(1):37-44, 2013. [doi]

Scheduling-scheme and parallel structure for multi-level lifting two-dimensional discrete wavelet transform without using frame-bufferBasant K. Mohanty, Anurag Mahajan. iet-cds, 7(6):319-325, 2013. [doi]

2012

Area- and Power-Efficient Architecture for High-Throughput Implementation of Lifting 2-D DWTBasant K. Mohanty, Anurag Mahajan, Pramod Kumar Meher. tcas, 59-II(7):434-438, 2012. [doi]

2010

Efficient VLSI architecture for implementation of 1-D discrete wavelet transform based on distributed arithmeticAnurag Mahajan, Basant K. Mohanty. apccas 2010: 1195-1198 [doi]

Implementation of low power FFT structure using a method based on conditionally coded blocksSandeep Saini, Anurag Mahajan, Srinivas B. Mandalika. apccas 2010: 935-938 [doi]

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