C. K. Sarkar - researchr alias

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Viewing Publication 1 - 7 from 7

2014

Design of High Performance 8 bit Multiplier using Vedic Multiplication Algorithm with McCMOS TechniqueD. Kayal, P. Mostafa, Anup Dandapat, C. K. Sarkar. vlsisp, 76(1):1-9, 2014. [doi]

2012

Design and Analysis of a Robust, High Speed, Energy Efficient 18 Transistor 1-bit Full Adder Cell, Modified with the Concept of MVT SchemeSubhramita Basak, Dipankar Saha, Sagar Mukherjee, Sayan Chatterjee, C. K. Sarkar. ised 2012: 130-134 [doi]

2010

Electron transport in two dimensional electron gas formed at the heterojunction of Al::x::Ga::(1-::::x::::)::N/GaN at microwave frequenciesA. Chakraborty, C. K. Sarkar. mr, 50(7):965-970, 2010. [doi]

2009

Investigation of novel attributes of single halo dual-material double gate MOSFETs for analog/RF applicationsN. Mohankumar, Binit Syamal, C. K. Sarkar. mr, 49(12):1491-1497, 2009. [doi]

2008

Implementation of a Topology Control Algorithm for MANETs Using Nomadic Community Mobility ModelSurendra S. Dalu, M. K. Naskar, C. K. Sarkar. iciis 2008: 1-5 [doi]

2007

Realization of quantum dot Boolean logic gate for image processing applicationsM. Ganguly, C. K. Sarkar. jei, 16(2):23003, 2007. [doi]

2006

Comparative studies on electronic transport due to the reduced dimensionality at the heterojunctions of GaAs/A1::x::Ga::(1-x)::As and Ga::x::In::(1-x)::As/InP systems at low temperaturesS. Shrestha, C. K. Sarkar. mj, 37(8):735-741, 2006. [doi]

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