Chian-Wei Liu - researchr alias

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Viewing Publication 1 - 5 from 5

2016

Diagnosis and Synthesis for Defective Reconfigurable Single-Electron Transistor ArraysChing-Yi Huang, Yun-Jui Li, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan. tvlsi, 24(6):2321-2334, 2016. [doi]

2015

A defect-aware approach for mapping reconfigurable Single-Electron Transistor arraysChing-Yi Huang, Chian-Wei Liu, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan. aspdac 2015: 118-123 [doi]

Synthesis for Width Minimization in the Single-Electron Transistor ArrayChian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Yung-Chih Chen, Chun-Yao Wang, Suman Datta, Vijaykrishnan Narayanan. tvlsi, 23(12):2862-2875, 2015. [doi]

2014

Width minimization in the Single-Electron Transistor array synthesisChian-Wei Liu, Chang-En Chiang, Ching-Yi Huang, Chun-Yao Wang, Yung-Chih Chen, Suman Datta, Vijaykrishnan Narayanan. date 2014: 1-4 [doi]

BDD-based synthesis of reconfigurable single-electron transistor arraysZheng Zhao, Chian-Wei Liu, Chun-Yao Wang, Weikang Qian. iccad 2014: 47-54 [doi]

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