Daniel Kucharski - researchr alias

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Viewing Publication 1 - 11 from 11

2023

Multi-population Algorithm Using Surrogate Models and Different Training PlansDaniel Kucharski, Krzysztof Cpalka. icaisc 2023: 385-398 [doi]

2021

Towards Sneaking as a Playful Input Modality for Virtual EnvironmentsSebastian Cmentowski, Andrey Krekhov, André Zenner, Daniel Kucharski, Jens H. Krüger. vr 2021: 473-482 [doi]

2014

2010

10Gb/s 15mW optical receiver with integrated Germanium photodetector and hybrid inductor peaking in 0.13µm SOI CMOS technologyDaniel Kucharski, Drew Guckenberger, Gianlorenzo Masini, Sherif Abdalla, J. Witzens, Subal Sahni. isscc 2010: 360-361 [doi]

The Impact of Solar Irradiance on AJISAI s Spin Period Measured by the Graz 2-kHz SLR SystemDaniel Kucharski, Georg Kirchner, Toshimichi Otsubo, Franz Koidl. tgrs, 48(3-2):1629-1633, 2010. [doi]

2009

Gravity Probe-B: New Methods to Determine Spin Parameters From kHz SLR DataGeorg Kirchner, Daniel Kucharski, Elena Cristea. tgrs, 47(1-2):370-375, 2009. [doi]

40Gb/s optical active cable using monolithic transceivers implemented in silicon photonics enabled 0.13-µm SOI CMOS TechnologyDaniel Kucharski, Luxtera Team. hotchips 2009: 1-24 [doi]

2007

A Fully Integrated 4 × 10-Gb/s DWDM Optoelectronic Transceiver Implemented in a Standard 0.13 µm CMOS SOI TechnologyAdithyaram Narasimha, Behnam Analui, Yi Liang, Thomas J. Sleboda, Sherif Abdalla, Erwin Balmater, Steffen Gloeckner, Drew Guckenberger, Mark Harrison, Roger G. M. P. Koumans, Daniel Kucharski, Attila Mekis, Sina Mirsaidi, Dan Song, Thierry Pinguet. jssc, 42(12):2736-2744, 2007. [doi]

2006

A Fully Integrated 20-Gb/s Optoelectronic Transceiver Implemented in a Standard 0.13- $\mu{\hbox {m}}$ CMOS SOI TechnologyBehnam Analui, Drew Guckenberger, Daniel Kucharski, Adithyaram Narasimha. jssc, 41(12):2945-2955, 2006. [doi]

2.5 V 43-45 Gb/s CDR Circuit and 55 Gb/s PRBS Generator in SiGe Using a Low-Voltage Logic FamilyDaniel Kucharski, Kevin T. Kornegay. jssc, 41(9):2154-2165, 2006. [doi]

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