John W. Fattaruso - researchr alias

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Viewing Publication 1 - 9 from 9

2016

Visualizing the Laplace domainJohn W. Fattaruso. iscas 2016: 1258-1261 [doi]

2006

A 3-V 4.25-Gb/s Laser Driver with 0.4-V Output Voltage ComplianceJohn W. Fattaruso, Benjamin Sheahan. jssc, 41(8):1930-1937, 2006. [doi]

4.25 Gb/s laser driver: design challenges and EDA tool limitationsBenjamin Sheahan, John W. Fattaruso, Jennifer Wong, Karlheinz Muth, Boris Murmann. dac 2006: 863-866 [doi]

2005

A 3V, 4.25Gb/s laser driver with 0.4V output voltage complianceJohn W. Fattaruso, Benjamin Sheahan. cicc 2005: 123-126 [doi]

1994

A fuzzy logic inference processorJohn W. Fattaruso, Shivaling S. Mahant-Shetti, J. Brock Barton. jssc, 29(4):397-402, April 1994. [doi]

1993

Self-calibration techniques for a second-order multibit sigma-delta modulatorJohn W. Fattaruso, Sami Kiriaki, Michiel de Wit, Greg Warwar. jssc, 28(12):1216-1223, December 1993. [doi]

1990

The effect of dielectric relaxation on charge-redistribution A/D convertersJohn W. Fattaruso, Michiel de Wit, Greg Warwar, Khen-Sang Tan, Richard K. Hester. jssc, 25(6):1550-1561, December 1990. [doi]

Fully differential ADC with rail-to-rail common-mode range and nonlinear capacitor compensationRichard K. Hester, Khen-Sang Tan, Michiel de Wit, John W. Fattaruso, Sami Kiriaki, James R. Hellums. jssc, 25(1):173-183, February 1990. [doi]

Error correction techniques for high-performance differential A/D convertersKhen-Sang Tan, Sami Kiriaki, Michiel de Wit, John W. Fattaruso, Ching-Yuh Tsay, W. Edward Matthews, Richard K. Hester. jssc, 25(6):1318-1327, December 1990. [doi]

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