Kiyohiro Furutani - researchr alias

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Viewing Publication 1 - 7 from 7

2005

Highly Flexible Row and Column Redundancy and Cycle Time Adaptive Read Data Path for Double Data Rate Synchronous MemoriesKiyohiro Furutani, Takeshi Hamamoto, Takeo Miki, Masaya Nakano, Takashi Kono, Shigeru Kikuda, Yasuhiro Konishi, Tsutomu Yoshihara. ieicet, 88-C(2):255-263, 2005. [doi]

2004

A 667-Mb/s operating digital DLL architecture for 512-Mb DDR SDRAMTakeshi Hamamoto, Kiyohiro Furutani, Takashi Kubo, Satoshi Kawasaki, Hironori Iga, Takashi Kono, Yasuhiro Konishi, Tsutomu Yoshihara. jssc, 39(1):194-206, 2004. [doi]

2000

1995

An automatic temperature compensation of internal sense ground for subquarter micron DRAM'sTsukasa Ooishi, Yuichiro Komiya, Kei Hamade, Mho Asakura, Kenichi Yasuda, Kiyohiro Furutani, Hideto Hidaka, Hiroshi Miyamoto, Hideyuki Ozaki. jssc, 30(4):471-479, April 1995. [doi]

1994

An adjustable output driver with a self-recovering Vpp generator for a 4M/spl times/16 DRAMKiyohiro Furutani, Hiroshi Miyamoto, Yoshikazu Morooka, M. Suwa, Hideyuki Ozaki. jssc, 29(3):308-310, March 1994. [doi]

An efficient back-bias generator with hybrid pumping circuit for 1.5-V DRAMsYasuhiko Tsukikawa, Takeshi Kajimoto, Yasuhiko Okasaka, Yoshikazu Morooka, Kiyohiro Furutani, Hiroshi Miyamoto, Hideyuki Ozaki. jssc, 29(4):534-538, April 1994. [doi]

1990

A pipelined microprocessor for logic programming languagesHiroshi Nakashima, Yasutaka Takeda, Katsuto Nakajima, Hideki Andou, Kiyohiro Furutani. iccd 1990: 355-359 [doi]

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