Majid Amini Valashani - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 5 from 5

2022

A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS processMohammad Moradinezhad Maryan, Seyed Javad Azhari, Majid Amini Valashani. integration, 87:1-10, 2022. [doi]

2021

A New Circuit-Level Technique for Leakage and Short-Circuit Power Reduction of Static Logic Gates in 22-nm CMOS TechnologyMohammad Moradinezhad Maryan, Majid Amini Valashani, Seyed Javad Azhari. cssp, 40(7):3536-3560, 2021. [doi]

An input controlled leakage restrainer transistor-based technique for leakage and short-circuit power reduction of 1-bit hybrid full addersMohammad Moradinezhad Maryan, Majid Amini Valashani, Seyed Javad Azhari. ijcta, 49(8):2382-2395, 2021. [doi]

2018

Design and analysis of a novel low-power and energy-efficient 18T hybrid full adderMajid Amini Valashani, Mehdi Ayat, Sattar Mirzakuchaki. mj, 74:49-59, 2018. [doi]

2016

A novel fast, low-power and high-performance XOR-XNOR cellMajid Amini Valashani, Sattar Mirzakuchaki. iscas 2016: 694-697 [doi]

Sign in or sign up to see more results.

runs on WebDSL