Masaru Takesue - researchr alias

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Viewing Publication 1 - 28 from 28

2011

E-mail Sender Identification through Trusted Local Deposit-AgentsMasaru Takesue. nbis 2011: 84-91 [doi]

2010

A Class of Recursive Networks on a Chip for Enhancing Intercluster ParallelismMasaru Takesue. dsd 2010: 389-392 [doi]

Cascaded Simple Filters for Accurate and Lightweight Email-Spam DetectionMasaru Takesue. securware 2010: 160-165 [doi]

2009

An HTTP Extension for Secure Transfer of Confidential DataMasaru Takesue. NAS 2009: 101-108 [doi]

Personalized Filtering of Polymorphic E-mail SpamMasaru Takesue. securware 2009: 249-254 [doi]

2008

A Protection Scheme against the Attacks Deployed by Hiding the Violation of the Same Origin PolicyMasaru Takesue. securware 2008: 133-138 [doi]

2007

A Scheme for Protecting the Information Leakage Via Portable DevicesMasaru Takesue. securware 2007: 54-59 [doi]

The SKB: A Semi-Completely-Connected Bus for On-Chip SystemsMasaru Takesue. canpc 2007: 404-414 [doi]

2006

A Bus-Based Recursive Mesh for High-Performance On-Chip SystemsMasaru Takesue. ISCApdcs 2006: 13-18

The psi-cube: a bus-based cube-type clustering network for high-performance on-chip systemsMasaru Takesue. pc, 32(11-12):852-869, 2006. [doi]

2005

The Psi-Cube: A Bus-Based Cube-Type Network for High-Performance On-Chip SystemsMasaru Takesue. icppw 2005: 539-546 [doi]

2004

DC-mesh: A Contracted High-Dimensional Mesh for Dynamic ClusteringMasaru Takesue. canpc 2004: 382-389 [doi]

2003

Software Queue-Based Algorithms for Pipelined Synchronization on MultiprocessorsMasaru Takesue. icppw 2003: 115-122 [doi]

A Model of Pipelined Mutual Exclusion on Cache-Coherent MultiprocessorsMasaru Takesue. europar 2003: 917-922 [doi]

Pipelined Conditional Synchronization on Large-Scale Cache-Coherent MultiprocessorsMasaru Takesue. ISCApdcs 2003: 132-138

2002

Pipelined Mutual Exclusion on Large-scale Cachecoherent MultiprocessorsMasaru Takesue. pdcs 2002: 736-745

1999

Psi-Cubes: Recursive Bused Fat-Hypercubes for Multilevel Snoopy CachesMasaru Takesue. ispan 1999: 62-67 [doi]

1998

Schemes for Reducing Communication Latency in Regular Computations on DSM MultiprocessorsMasaru Takesue. icpp 1998: 164-171 [doi]

1997

A tampering protocol for reducing the coherence transactions in regular computationMasaru Takesue. ispan 1997: 465-471 [doi]

1994

Parallel Symbolic Processing with the Distributed ListsMasaru Takesue. pasco 1994: 373-381

1993

A Family of Parallel Prefix Algorithms Embedded in NetworksMasaru Takesue. tpds, 4(10):1179-1184, 1993. [doi]

1992

Cache Memories for Data Flow MachinesMasaru Takesue. TC, 41(6):677-687, 1992.

1989

Dataflow Computer Extension Towards Real-Time ProcessingMasaru Takesue. rts, 1(4):333-350, 1989.

1988

A distributed load-balancing system and its application to list-processing oriented data-flow machine dfmMasaru Takesue. scjapan, 19(6):35-49, 1988. [doi]

A Load Control Mechanism for Data-Flow MachinesMasaru Takesue. scjapan, 19(10):55-69, 1988. [doi]

1987

DFM: the data flow machine highly parallel symbol manipulationMakoto Amamiya, Masaru Takesue, Ryuzo Hasegawa, Hirohide Mikami. fjcc 1987: 602-611 [doi]

A Unified Resource Management and Execution Control Mechanism for Data Flow MachinesMasaru Takesue. isca 1987: 90-97

1986

Implementation and Evaluation of a List-Processing-Oriented Data Flow MachineMakoto Amamiya, Masaru Takesue, Ryuzo Hasegawa, Hirohide Mikami. isca 1986: 10-19

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