Rajesh Thakker - researchr alias

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Viewing Publication 1 - 5 from 5

2019

Improving the performance of transmission gate and hybrid CMOS Full Adders in chain and tree structure architecturesManan Mewada, Mazad Zaveri, Rajesh Thakker. integration, 69:381-392, 2019. [doi]

2018

A near-threshold 10T differential SRAM cell with high read and write margins for tri-gated FinFET technologyMitesh Limachia, Rajesh Thakker, Nikhil Kothari. integration, 61:125-137, 2018. [doi]

Hybrid offset compensated latch-type sense amplifier for tri-gated FinFET technologyMitesh Limachia, Dixit Vyas, Rajesh Thakker, Nikhil Kothari. integration, 62:258-269, 2018. [doi]

Parameter Extraction of PSP MOSFET Model Using Particle Swarm Optimization - SoC ApproachAmit Rathod, Rajesh Thakker. vdat 2019: 483-494 [doi]

2017

Characterization of a Novel 10T Low-Voltage SRAM Cell with High Read and Write Margin for 20nm FinFET TechnologyMitesh Limachia, Pathik Viramgama, Rajesh Thakker, Nikhil Kothari. vlsid 2017: 309-314 [doi]

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