Steve Haga - researchr alias

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Viewing Publication 1 - 10 from 10

2021

Structure-Behavior Coalescence Method for Formal Specification of UML 2.0 Sequence DiagramsSteve Haga, Wei-Ming Ma, William Shanchung Chao. jcse, 15(4):148-159, 2021. [doi]

2015

An OpenGL ES 2.0 3D graphics SoC with versatile HW/SW development supportHsu-Kang Dow, Ching-Hua Huang, Chun-Hung Lai, Kai-Hsiang Tsao, Sheng-Chih Tseng, Kun-Yi Wu, Ting-Hsuan Wu, Ho-Chun Yang, Da-Jing Zhang Jain, Yun-Nan Chang, Steve Haga, Shen-Fu Hsiao, Ing-Jer Huang, Shiann-Rong Kuang, Chung-Nan Lee. vlsi-dat 2015: 1-4 [doi]

2012

Layered video multicast using fractional frequency reuse over wireless relay networksChung-Nan Lee, Ying-Tsuen Chen, Yung-Cheng Kao, Hui-Hsiang Kao, Steve Haga. ejwcn, 2012:187, 2012. [doi]

2005

VLIW Instruction Scheduling for Reduced Code SizeSteve Haga. PhD thesis, University of Maryland, College Park, MD, USA, 2005. [doi]

Dynamic Functional Unit Assignment for Low PowerSteve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu. tjs, 31(1):47-62, 2005. [doi]

Reducing code size in VLIW instruction schedulingSteve Haga, Andrew Webber, Yi Zhang, Nghi Nguyen, Rajeev Barua. jec, 1(3):415-433, 2005. [doi]

2004

Execution History Guided Instruction PrefetchingYi Zhang, Steve Haga, Rajeev Barua. tjs, 27(2):129-147, 2004. [doi]

2003

Dynamic Functional Unit Assignment for Low PowerSteve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu. In Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest, Norbert Wehn, editors, Embedded Software for SoC. pages 485-497, Kluwer / Springer, 2003. [doi]

Dynamic Functional Unit Assignment for Low PowerSteve Haga, Natasha Reeves, Rajeev Barua, Diana Marculescu. date 2003: 11052-11057 [doi]

2002

Execution history guided instruction prefetchingYi Zhang, Steve Haga, Rajeev Barua. ics 2002: 199-208 [doi]

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