Takayuki Morishita - researchr alias

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Viewing Publication 1 - 13 from 13

2021

Study of dual-band concurrent LNA equipping mutual inductive notch filter matching circuitYuito Sawayama, Takayuki Morishita, Kiyotaka Komoku, Nobuyuki Itoh. ieiceee, 18(5):20210046, 2021. [doi]

2018

Modeling and Layout Optimization of MOM Capacitor for High-Frequency ApplicationsYuka Itano, Taishi Kitano, Yuta Sakamoto, Kiyotaka Komoku, Takayuki Morishita, Nobuyuki Itoh. ieicet, 101-A(2):441-446, 2018. [doi]

2016

A Study of Striped Inductor for K- and Ka-Band Voltage-Controlled OscillatorsNobuyuki Itoh, Hiroki Tsuji, Yuka Itano, Takayuki Morishita, Kiyotaka Komoku, Sadayuki Yoshitomi. ieicet, 99-C(6):614-622, 2016. [doi]

A study of current-reuse 800 MHz/1.9 GHz concurrent dual-band amplifierTakuma Ogawa, Takayuki Morishita, Kiyotaka Komoku, Yuka Itano, Sadayuki Yoshitomi, Nobuyuki Itoh. rws 2016: 245-247 [doi]

2009

Current-Voltage Hysteresis Characteristics in MOS Capacitors with Si-Implanted OxideToshihiro Matsuda, Shinsuke Ishimaru, Shingo Nohara, Hideyuki Iwata, Kiyotaka Komoku, Takayuki Morishita, Takashi Ohzone. ieicet, 92-C(12):1523-1530, 2009. [doi]

2008

A Test Structure for Asymmetry and Orientation Dependence Analysis of CMOSFETsToshihiro Matsuda, Yuya Sugiyama, Keita Nohara, Kazuhiro Morita, Hideyuki Iwata, Takashi Ohzone, Takayuki Morishita, Kiyotaka Komoku. ieicet, 91-C(8):1331-1337, 2008. [doi]

2007

A CMOS Temperature Sensor CircuitTakashi Ohzone, Tatsuaki Sadamoto, Takayuki Morishita, Kiyotaka Komoku, Toshihiro Matsuda, Hideyuki Iwata. ieicet, 90-C(4):895-902, 2007. [doi]

A Test Structure to Analyze Electrical CMOSFET Reliabilities between Center and Edge along the Channel WidthTakashi Ohzone, Eiji Ishii, Takayuki Morishita, Kiyotaka Komoku, Toshihiro Matsuda, Hideyuki Iwata. ieicet, 90-C(2):515-522, 2007. [doi]

2006

A Test Structure to Analyze Highly-Doped-Drain and Lightly-Doped-Drain in CMOSFETTakashi Ohzone, Kazuhiko Okada, Takayuki Morishita, Kiyotaka Komoku, Toshihiro Matsuda, Hideyuki Iwata. ieicet, 89-C(9):1351-1357, 2006. [doi]

1999

Development support software of cell array processor and its neural network applicationNoriko Akita, Fumihiro Hatano, Kiyotaka Komoku, Takayuki Morishita, Iwao Teramoto. ijcnn 1999: 2452-2455 [doi]

Implementation of cell array neuro-processor by using FPGAFumihiro Hatano, Noriko Akita, Kiyotaka Komoku, Takayuki Morishita, Iwao Teramoto. ijcnn 1999: 2447-2451 [doi]

1996

Architecture of Cell Array Neuro-ProcessorTakayuki Morishita, Iwao Teramoto. ices 1996: 277-288

1995

Processing cell array neural network multiprocessorsTakayuki Morishita, Iwao Teramoto. icnn 1995: 1470-1473 [doi]

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