Journal: IEEE Design & Test of Computers

Volume 14, Issue 1

0 -- 0J. Wilson. CFI leads development of design data standard
0 -- 0. News
4 -- 5. Keeping in touch: Reader survey results; planned e-mail survey
8 -- 9Marc E. Levitt. Guest Editor s Introduction: Microprocessors Lead the Way in Complex Design
10 -- 17Marc E. Levitt. Designing UltraSparc for Testability
18 -- 24Lynn Youngs, Siva Paramanandam. Mapping and Repairing Embedded-Memory Defects
25 -- 33Dilip K. Bhavsar, John H. Edmondson. Alpha 21164 Testability Strategy
34 -- 41Jainendra Kumar. Prototyping the M68060 for Concurrent Verification
42 -- 49Margarida F. Jacome, Viktor S. Lapinskii. NREC: Risk Assessment and Planning of Complex Designs
50 -- 54Robert Wu, Jerry Gerner, Richard Wheelus, Kevin Lew. Testing Logic-Intensive Memory ICs on Memory Testers
55 -- 63Al Bailey, Tim Lada, Jim Preston. Collateral ASIC Test
64 -- 74Ghassan Al Hayek, Yves Le Traon, Chantal Robach. Impact of System Partitioning on Test Cost
75 -- 83. Hardware-Software Codesign
84 -- 87. Panel Summaries
88 -- 90. Conference Reports
92 -- 93. Design Automation Technical Committee Newsletter
94 -- 95. Test Technology Tc Newsletter
96 -- 0Scott Davidson. George learns test