Dilip K. Bhavsar - researchr alias

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Viewing Publication 1 - 23 from 23

2011

Harmony Widget for X-free scan testingDilip K. Bhavsar. vts 2011: 225-228 [doi]

Test access and the testability features of the Poulson multi-core Intel Itanium® processorDilip K. Bhavsar, Steve Poehlman. itc 2011: 1-8 [doi]

2005

A Built-in Self-Test Method for Write-only Content Addressable MemoriesDilip K. Bhavsar. vts 2005: 9-14 [doi]

2003

Testability Features of the Alpha 21364 MicroprocessorScott Erlanger, Dilip K. Bhavsar, Richard A. Davies. itc 2003: 764-772 [doi]

Automatic Generation of Critical-Path Tests for a Partial-Scan MicroprocessorJoel Grodstein, Dilip K. Bhavsar, Vijay Bettada, Richard A. Davies. iccd 2003: 180-186 [doi]

2002

Scan Islands - A Scan Partitioning Architecture and its Implementation on the Alpha 21364 ProcessorDilip K. Bhavsar, Richard A. Davies. vts 2002: 16-24 [doi]

2001

Observability Register Architecture For Efficient Production Test And Debug Of Vlsi CircuitsDilip K. Bhavsar, Rishan Tan. vlsid 2001: 385-390 [doi]

Scan Wheel - A Technique for Interfacing a High Speed Scan-Path with a Slow Speed TesterDilip K. Bhavsar. vts 2001: 94-101 [doi]

2000

Synchronizing the IEEE 1149.1 Test Access Port for Chip-Level TestabilityDilip K. Bhavsar. dt, 17(2):94-99, 2000. [doi]

1999

ITC 99 PanelsDilip K. Bhavsar. dt, 16(4):96-99, 1999.

An algorithm for row-column self-repair of RAMs and its implementation in the Alpha 21264Dilip K. Bhavsar. itc 1999: 311-318

1998

A highly testable and diagnosable fabrication process test chipDilip K. Bhavsar, Ugonna Echeruo, David R. Akeson, William J. Bowhill. itc 1998: 853-861 [doi]

Testability access of the high speed test features in the Alpha 21264 microprocessorDilip K. Bhavsar, David R. Akeson, Michael K. Gowan, Daniel B. Jackson. itc 1998: 487 [doi]

ITC 97 Panel SessionsDilip K. Bhavsar, Yervant Zorian. dt, 15(1), 1998.

1997

Alpha 21164 Testability StrategyDilip K. Bhavsar, John H. Edmondson. dt, 14(1):25-33, 1997. [doi]

1994

Testability Strategy of the ALPHA AXP 21164 MicroprocessorDilip K. Bhavsar, John H. Edmondson. itc 1994: 50-59

1991

Testing Interconnections to Static RAMsDilip K. Bhavsar. dt, 8(2):63-71, 1991. [doi]

An Architecture for Extending the IEEE Standard 1149.1 Test Access Port to System BackplanesDilip K. Bhavsar. itc 1991: 768-776

1986

A New Economical Implementation for Scannable Flip-Flops in MOSDilip K. Bhavsar. dt, 3(3):52-56, 1986. [doi]

1985

Concatenable Polydividers : Bit-Sliced LFSR Chips for Board Self-TestDilip K. Bhavsar. itc 1985: 88-93

1984

Can We Eliminate Fault Escape in Self-Testing by Polynomial Division (Signature Analysis) ?Dilip K. Bhavsar, Balakrishnan Krishnamurthy. itc 1984: 134-139

1983

Design For Test Calculus: An algorithm for DFT rules checkingDilip K. Bhavsar. dac 1983: 300-307 [doi]

1981

Self-Testing by Polynomial DivisionDilip K. Bhavsar, Richard W. Heckelman. itc 1981: 208-216

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