| 0 | -- | 0 | Ivo Bolsens, Marco Cecchini. IP-based business conflicts |
| 2 | -- | 3 | . VHDL fault injection questioned |
| 3 | -- | 0 | . News |
| 5 | -- | 13 | . Adventures in the Mainframe Trade |
| 14 | -- | 15 | Peter Marwedel, Carlos A. López-Barrio. Guest Editor s Introduction: Design, Design Automation, and Test in Europe |
| 16 | -- | 25 | Clifford Liem, François Naçabal, Carlos A. Valderrama, Pierre G. Paulin, Ahmed Amine Jerraya. System-on-a-Chip Cosimulation and Compilation |
| 26 | -- | 33 | Manoj Sachdev. Open Defects in CMOS RAM Address Decoders |
| 34 | -- | 39 | Jean-Michel Karam, Bernard Courtois, Hicham Boutamine. CAD Tools for Bridging Microsystems and Foundries |
| 40 | -- | 50 | Reinaldo A. Bergamaschi, Salil Raje. Observable Time Windows: Verifying High-Level Synthesis Results |
| 51 | -- | 59 | Rolf Drechsler, Bernd Becker, Stefan Ruppertz. The K*BMD: A Verification Data Structure |
| 60 | -- | 71 | Michael Nicolaidis, Ricardo de Oliveira Duarte, Salvador Manich, Joan Figueras. Fault-Secure Parity Prediction Arithmetic Operators |
| 72 | -- | 80 | Rajesh K. Gupta, Stan Y. Liao. Using a Programming Language for Digital System Design |
| 96 | -- | 0 | Scott Davidson. Why projects are late |