| 6 | -- | 7 | Yervant Zorian. D&T Expands |
| 8 | -- | 10 | . News |
| 8 | -- | 0 | . Letter to the Editor |
| 11 | -- | 19 | Hugo De Man. System-on-Chip Design: Impact on Education and Research |
| 20 | -- | 22 | Tony Ambler, Ben Bennetts. Guest Editors Introduction: Test and the Product Life Cycle |
| 23 | -- | 27 | Jon Turino. Design for Test and Time to Market: A Personal Perspective |
| 34 | -- | 43 | Mike Wondolowski, Ben Bennetts, Adam W. Ley. Boundary Scan: The Internet of Test |
| 44 | -- | 52 | Bertram Weber. Automating PBX System Testing |
| 53 | -- | 63 | Susana Stoica. Generating Functional Design Verification Tests |
| 64 | -- | 71 | Charles F. Hawkins, Jaume Segura. Test and Reliability: Partners in IC Manufacturing, Part 1 |
| 72 | -- | 80 | Mark C. Hansen, Hakan Yalcin, John P. Hayes. Unveiling the ISCAS-85 Benchmarks: A Case Study in Reverse Engineering |
| 81 | -- | 89 | Andreas Steininger, Christopher Temple. Economic Online Self-Test in the Time-Triggered Architecture |
| 90 | -- | 101 | Michael Nicolaidis, Ricardo de Oliveira Duarte. Fault-Secure Parity Prediction Booth Multipliers |
| 102 | -- | 111 | Lee Melatti, Barry Blancha. Testing Methodology for FireWire |
| 121 | -- | 122 | Mukund Modi. Status Report on Standards Affecting Design and Test |
| 128 | -- | 0 | Stephen K. Sunter. Analog, digital, and mixed-signal people |