External Links

    Journal: IEEE Design & Test of Computers

    Volume 2, Issue 1

    19 -- 30John K. Ousterhout, Gordon T. Hamachi, Robert N. Mayo, Walter S. Scott, George S. Taylor. The Magic VLSI Layout System
    31 -- 37Todd J. Wagner. Hierarchical Layout Verification
    38 -- 44Sunil K. Jain, Vishwani D. Agrawal. Statistical Fault Analysis
    45 -- 54Louis I. Steinberg, Tom M. Mitchell. The Redesign System: A Knowledge-Based Approach to VLSI CAD
    55 -- 62Karl J. Lieberherr. Toward a Standard Hardware Description Language
    63 -- 69John D. Crawford. EDIF: A Mechanism for the Exchange of Design Information
    82 -- 86J. Daniel Nash. New Products Design
    87 -- 91Conrad Zagwyn. New Products Test
    94 -- 95Robert E. Anderson. Book Reviews
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