Journal: IEEE Design & Test of Computers

Volume 25, Issue 2

105 -- 0Tim Cheng. Test compression saves bits, cycles, and money
112 -- 113Scott Davidson, Nur A. Touba. Guest Editors Introduction: Progress in Test Compression
114 -- 120Rohit Kapur, Subhasish Mitra, Thomas W. Williams. Historical Perspective on Scan Compression
122 -- 130Laung-Terng Wang, Xiaoqing Wen, Shianling Wu, Zhigang Wang, Zhigang Jiang, Boryau Sheu, Xinli Gu. VirtualScan: Test Compression Technology Using Combinational Logic and One-Pass ATPG
132 -- 140Chao-Wen Tzeng, Shi-Yu Huang. UMC-Scan Test Methodology: Exploiting the Maximum Freedom of Multicasting
142 -- 148Kee Sup Kim, Ming Zhang. Hierarchical Test Compression for SoC Designs
150 -- 159Ganesh Srinivasan, Friedrich Taenzler, Abhijit Chatterjee. Loopback DFT for Low-Cost Test of Single-VCO-Based Wireless Transceivers
160 -- 166Qizhang Yin, William R. Eisenstadt, Tian Xia. Wireless System for Microwave Test Signal Generation
168 -- 177Melvin A. Breuer, Haiyang (Henry) Zhu. An Illustrated Methodology for Analysis of Error Tolerance
178 -- 186Hamidreza Hashempour, Fabrizio Lombardi. Device Model for Ballistic CNFETs Using the First Conducting Band
187 -- 0Joe Damore. DATC Newsletter
192 -- 193Victor Berman. Standards update from IP 07
194 -- 195Sachin S. Sapatnekar. Building your yield of dreams
198 -- 199Bruce C. Kim. TTTC Newsletter
200 -- 0Scott Davidson. The commonality of vector generation techniques