| 8 | -- | 17 | John Keane, Chris H. Kim, Qunzeng Liu, Sachin S. Sapatnekar. Process and Reliability Sensors for Nanoscale CMOS |
| 18 | -- | 26 | Min Chen, Vijay Reddy, Srikanth Krishnan, Venkatesh Srinivasan, Yu Cao. Asymmetric Aging and Workload Sensitive Bias Temperature Instability Sensors |
| 27 | -- | 36 | Jackson Pachito, Celestino V. Martins, B. Jacinto, Jorge Semião, Julio César Vázquez, Víctor H. Champac, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira. Aging-Aware Power or Frequency Tuning With Predictive Fault Detection |
| 37 | -- | 46 | Seetharam Narasimhan, Wen Yueh, Xinmu Wang, Saibal Mukhopadhyay, Swarup Bhunia. Improving IC Security Against Trojan Attacks Through Integration of Security Monitors |
| 47 | -- | 53 | M. Kamm, H. Jun, L. Boluna. SerDes Interoperability and Optimization |
| 55 | -- | 62 | S. Sunter, A. Roy. Contactless Test of IC Pads, Pins, and TSVs via Standard Boundary Scan |
| 63 | -- | 71 | Masahiro Ishida, Kiyotaka Ichiyama, Tasuku Fujibe, Daisuke Watanabe, Masayuki Kawabata. Real-Time Testing Method for Multilevel Signal Interfaces and Its Impact on Test Cost |
| 72 | -- | 80 | Bram Kruseman, Bratislav Tasic, Camelia Hora, Jos Dohmen, Hamidreza Hashempour, Maikel van Beurden, Yizi Xing. Defect Oriented Testing for Analog/Mixed-Signal Designs |
| 81 | -- | 93 | Wing Chiu Tam, Ronald D. Blanton. Physically-Aware Analysis of Systematic Defects in Integrated Circuits |
| 94 | -- | 99 | Michael Nicolaidis. Biologically Inspired Robust Tera-Device Processors |
| 102 | -- | 104 | Stan Krolikoski. Two Approaches to Handling Late Essential/Necessary Patent Claims Against Standards |