Journal: Embedded Systems Letters

Volume 2, Issue 4

103 -- 106Mohamed M. Sabry, José L. Ayala, David Atienza. Thermal-Aware Compilation for Register Window-Based Embedded Processors
107 -- 110Cristiana Bolchini, Chiara Sandionigi. Fault Classification for SRAM-Based FPGAs in the Space Environment for Fault Mitigation
111 -- 114Kostas Siozios, Dimitrios Soudris. A Methodology for Alleviating the Performance Degradation of TMR Solutions
115 -- 118Rami A. Abdallah, Naresh R. Shanbhag. Minimum-Energy Operation Via Error Resiliency
119 -- 122Serge Midonnet, Damien Masson, R. Lassalle. Slack-Time Computation for Temporal Robustness in Embedded Systems
123 -- 126Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede. Radiation-Hardened Reconfigurable Array With Instruction Roll-Back
127 -- 130Karthik Shankar, Roman L. Lysecky. Control Focused Soft Error Detection for Embedded Applications

Volume 2, Issue 3

49 -- 52Xi Jin, Nan Guan, Mingsong Lv, Qingxu Deng. Improving the Performance of Shared Memory Communication in Impulse C
53 -- 57Ulrich Kühne, Daniel Große, Rolf Drechsler. Towards Fully Automatic Synthesis of Embedded Software
58 -- 61Bridget Benson, Ying Li, Brian Faunce, Kenneth Domond, Don Kimball, Curt Schurgers, Ryan Kastner. Design of a Low-Cost Underwater Acoustic Modem
62 -- 66Kwangok Jeong, Andrew B. Kahng, B. Lin, Kambiz Samadi. Accurate Machine-Learning-Based On-Chip Router Modeling
67 -- 71I. Hammad, Kamal El-Sankary, Ezz I. El-Masry. High-Speed AES Encryptor With Efficient Merging Techniques
72 -- 76Abhinav Agarwal, Man Cheuk Ng, Arvind. A Comparative Evaluation of High-Level Hardware Synthesis Using Reed-Solomon Decoder
77 -- 80Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu, Guy Bois, Pierre G. Paulin. Multi-Optical Network-on-Chip for Large Scale MPSoC
81 -- 84Se Hun Kim, S. Mukohopadhyay, Marilyn Wolf. System-Level Energy Optimization for Error-Tolerant Image Compression
85 -- 89Yong Zou, Sudeep Pasricha. NARCO: Neighbor Aware Turn Model-Based Fault Tolerant Routing for NoCs

Volume 2, Issue 2

23 -- 26Ravi Kumar Satzoda, Suchitra Sathyanarayana, Thambipillai Srikanthan, Suchitra Sathyanarayana. Hierarchical Additive Hough Transform for Lane Detection
27 -- 30Giovanni Danese, Mauro Giachero, Francesco Leporati, Alessandra Majani, Nelson Nazzicari, C. Virgili. A Video Elaboration System for Image Deinterlacing and Processing in Race Cars
31 -- 34Yasser Shoukry, M. Watheq El-Kharashi, Sherif Hammad. MPC-On-Chip: An Embedded GPC Coprocessor for Automotive Active Suspension Systems
35 -- 38Jonas Rox, Kerstin Schmidt, A. Winter, Thomas Spengler, Rolf Ernst. Estimating and Mitigating Design Risk in a Flexible Distributed Design Process
39 -- 42Cristiano Spelta, Vincenzo Manzoni, Andrea Corti, A. Goggi, Sergio M. Savaresi. Smartphone-Based Vehicle-to-Driver/Environment Interaction System for Motorcycles

Volume 2, Issue 1

1 -- 4Li Hsien Yoong, Partha S. Roop. Verifying IEC 61499 Function Blocks Using Esterel
5 -- 9Paolo Meloni, Simone Secchi, Luigi Raffo. An FPGA-Based Framework for Technology-Aware Prototyping of Multicore Embedded Architectures
10 -- 13Ashish Shenoy, Jeff Hiner, Susan Lysecky, Roman L. Lysecky, Ann Gordon-Ross. Evaluation of Dynamic Profiling Methodologies for Optimization of Sensor Networks