Journal: Formal Methods in System Design

Volume 22, Issue 3

183 -- 203Signe J. Silver, Janusz A. Brzozowski. True Concurrency in Models of Asynchronous Circuit Behavior
205 -- 224Anuj Goel, Khurram Sajid, Hai Zhou, Adnan Aziz, Vigyan Singhal. BDD Based Procedures for a Theory of Equality with Uninterpreted Functions
225 -- 248Wing Lok Yeung, Steve Schneider. Design and Verification of Distributed Recovery Blocks with CSP
249 -- 282J. J. T. Kleijn, Michel A. Reniers, J. E. Rooda. Analysis of an Industrial System

Volume 22, Issue 2

95 -- 99Ganesh Gopalakrishnan, Warren A. Hunt Jr.. Industrial Practice of Formal Hardware Verification: A Sampling
101 -- 108Shoham Ben-David, Cindy Eisner, Daniel Geist, Yaron Wolfsthal. Model Checking at IBM
109 -- 116Mani Azimi, Ching-Tsun Chou, Akhilesh Kumar, Victor W. Lee, Phanindra K. Mannava, Seungjoon Park. Experience with Applying Formal Methods to Protocol Specification and System Architecture
117 -- 123Magdy S. Abadir, Ken Albin, John Havlicek, Narayanan Krishnamurthy, Andrew K. Martin. Formal Verification Successes at Motorola
125 -- 131Rajeev Joshi, Leslie Lamport, John Matthews, Serdar Tasiran, Mark R. Tuttle, Yuan Yu. Checking Cache-Coherence Protocols with TLA:::+:::
133 -- 141Steven M. German. Formal Design of Cache Memory Protocols in IBM
143 -- 153John Harrison. Formal Verification of Square Root Algorithms
155 -- 161Pascalin Amagbégnon, Uri Barkai. Verifying the Implementation of an Error Control Code
163 -- 173William Adams, Warren A. Hunt Jr., Damir Jamsek. Verisym: Verifying Circuits by Symbolic Simulation

Volume 22, Issue 1

5 -- 38Howard Bowman, Helen Cameron, Peter R. King, Simon J. Thompson. Mexitl: Multimedia in Executable Interval Temporal Logic
39 -- 58Martin Keim, Rolf Drechsler, Bernd Becker, Michael Martin, Paul Molitor. Polynomial Formal Verification of Multipliers
59 -- 86Béatrice Bérard, Laurent Fribourg, Francis Klay, Jean-François Monin. Compared Study of Two Correctness Proofs for the Standardized