Adnan Aziz - researchr alias

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Viewing Publication 1 - 91 from 91

2021

Datacenter-Scale Analysis and Optimization of GPU Machine Learning WorkloadsLukasz Wesolowski, Bilge Acun, Valentin Andrei, Adnan Aziz, Gisle Dankel, Christopher Gregg, Xiaoqiao Meng, Cyril Meurillon, Denis Sheahan, Lei Tian, Janet Yang, Peifeng Yu, Kim Hazelwood. micro, 41(5):101-112, 2021. [doi]

2018

Classification of SIP Attack Variants with a Hybrid Self-enforcing NetworkWaldemar Hartwig, Christina Klüver, Adnan Aziz, Dirk Hoffstadt. icann 2018: 456-466 [doi]

Application of Visual Analysis to Detect and Analyze Patterns in VoIP Attack TrafficEkaterina Volodina, Adnan Aziz, Erwin P. Rathgeb, Tobias Hoßfeld. trustcom 2018: 260-268 [doi]

2015

Global VoIP security threats - large scale validation based on independent honeynetsMarkus Gruber, Dirk Hoffstadt, Adnan Aziz, Florian Fankhauser, Christian Schanes, Erwin P. Rathgeb, Thomas Grechenig. networking 2015: 1-9 [doi]

2014

A distributed infrastructure to analyse SIP attacks in the InternetAdnan Aziz, Dirk Hoffstadt, Erwin P. Rathgeb, Thomas Dreibholz. networking 2014: 1-9 [doi]

2013

Development and Analysis of Generic VoIP Attack Sequences Based on Analysis of Real Attack TrafficAdnan Aziz, Dirk Hoffstadt, Sebastian Ganz, Erwin P. Rathgeb. trustcom 2013: 675-682 [doi]

2009

TuneLogic: Post-silicon tuning of dual-Vdd designsStephen Bijansky, Sae Kyu Lee, Adnan Aziz. isqed 2009: 394-400 [doi]

2008

Optimal Constraint-Preserving Netlist SimplificationJason Baumgartner, Hari Mony, Adnan Aziz. FMCAD 2008: 1-9 [doi]

TuneFPGA: post-silicon tuning of dual-Vdd FPGAsStephen Bijansky, Adnan Aziz. dac 2008: 796-799 [doi]

Adaptive SRAM memory for low power and high yieldBaker Mohammad, Stephen Bijansky, Adnan Aziz, Jacob A. Abraham. iccd 2008: 176-181 [doi]

2007

The hazard-free superscalar pipeline fast fourier transform algorithm and architectureBassam Jamil Mohd, Adnan Aziz, Earl E. Swartzlander Jr.. vlsi 2007: 194-199 [doi]

The Hazard-Free Superscalar Pipeline Fast Fourier Transform Architecture and AlgorithmBassam Jamil Mohd, Earl E. Swartzlander Jr., Adnan Aziz. vlsi 2009: 1-22 [doi]

Provisioning On-Chip Networks under Buffered RC Interconnect Delay VariationsMosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, Yehia Massoud. isqed 2007: 873-878 [doi]

Contention-free switch-based implementation of 1024-point Radix-2 Fourier Transform EngineHani Saleh, Bassam Jamil Mohd, Adnan Aziz, Earl E. Swartzlander Jr.. iccd 2007: 7-12 [doi]

A heterogeneous CMOS-CNT architecture utilizing novel coding of boolean functionsAshish Kumar Singh, Hady Ali Zeineddine, Adnan Aziz, Sriram Vishwanath, Michael Orshansky. NANOARCH 2007: 15-20 [doi]

Implementing DSP Algorithms with On-Chip NetworksXiang Wu, Tamer Ragheb, Adnan Aziz, Yehia Massoud. nocs 2007: 307-316 [doi]

Sequential Circuits for Relational AnalysisFadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid. ICSE 2007: 13-22 [doi]

Global Optimization of Compositional SystemsFadi A. Zaraket, John Pape, Adnan Aziz, Margarida F. Jacome, Sarfraz Khurshid. FMCAD 2007: 93-100 [doi]

Sequential circuits for program analysisFadi A. Zaraket, Adnan Aziz, Sarfraz Khurshid. ASE 2007: 114-123 [doi]

2006

2005

Exploiting Constraints in Transformation-Based VerificationHari Mony, Jason Baumgartner, Adnan Aziz. charme 2005: 269-284 [doi]

Scalable compositional minimization via static analysisFadi A. Zaraket, Jason Baumgartner, Adnan Aziz. iccad 2005: 1060-1067

2004

2003

A near optimal scheduler for switch-memory-switch routersAdnan Aziz, Amit Prakash, Vijaya Ramachandran. spaa 2003: 343-352 [doi]

An Abstraction Algorithm for the Verification of Level-Sensitive Latch-Based NetlistsJason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz. fmsd, 23(1):39-65, 2003. [doi]

BDD Based Procedures for a Theory of Equality with Uninterpreted FunctionsAnuj Goel, Khurram Sajid, Hai Zhou, Adnan Aziz, Vigyan Singhal. fmsd, 22(3):205-224, 2003. [doi]

A high-performance architecture and BDD-based synthesis methodology for packet classificationAmit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz. tcad, 22(6):698-709, 2003. [doi]

Sequential optimization in the absence of global resetVigyan Singhal, Carl Pixley, Adnan Aziz, Shaz Qadeer, Robert K. Brayton. todaes, 8(2):222-251, 2003. [doi]

Constraint synthesis for environment modeling in functional verificationJun Yuan, Ken Albin, Adnan Aziz, Carl Pixley. dac 2003: 296-299 [doi]

A Framework for Constrained Functional VerificationJun Yuan, Carl Pixley, Adnan Aziz, Ken Albin. iccad 2003: 142-145 [doi]

2002

Formula-Dependent Equivalence for Compositional CTL Model CheckingAdnan Aziz, Thomas R. Shiple, Vigyan Singhal, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli. fmsd, 21(2):193-224, 2002.

Improved SAT-Based Bounded Reachability AnalysisMalay K. Ganai, Adnan Aziz. vlsid 2002: 729-734 [doi]

Multicast Scheduling for Switches with Multiple Input-QueuesShashank Gupta, Adnan Aziz. hoti 2002: 28-36 [doi]

A Middle Ground between CAMs and DAGs for High-Speed Packet ClassificationAmit Prakash, Adnan Aziz. hoti 2002: 89-94 [doi]

A Reconfigurable Architecture and Associated Synthesis Methodology for High Speed Packet ClassificationAmit Prakash, Ramakrishna Kotla, Tanmoy Mandal, Adnan Aziz. iwls 2002: 97-102

An O(log:::2:::::::N::::) parallel algorithm for output queuingSadia Sharif, Adnan Aziz, Amit Prakash. infocom 2002: 1623-1629 [doi]

A Method for Synthesizing Boolean ConstrainsJun Yuan, Kurt Shultz, John Havlicek, Ken Albin, Adnan Aziz. iwls 2002: 351-353

Simplifying Boolean constraint solving for random simulation-vector generationJun Yuan, Ken Albin, Adnan Aziz, Carl Pixley. iccad 2002: 123-127 [doi]

Simplifying Constraint Solving in Random Simulation GenerationJun Yuan, Ken Albin, Adnan Aziz, Carl Pixley. iwls 2002: 185-190

2001

Efficient control state-space searchAdnan Aziz, James H. Kukula, Thomas R. Shiple, Jun Yuan. tcad, 20(2):332-336, 2001. [doi]

SIVA: A System for Coverage-Directed State Space SearchMalay K. Ganai, Praveen Yalagandula, Adnan Aziz, Andreas Kuehlmann, Vigyan Singhal. et, 17(1):11-27, 2001. [doi]

Rarity based guided state space searchMalay K. Ganai, Adnan Aziz. glvlsi 2001: 97-102 [doi]

Optimizing designs containing black boxesTai-Hung Liu, Adnan Aziz, Vigyan Singhal. todaes, 6(4):591-601, 2001. [doi]

Integrated power supply planning and floorplanningI-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz, D. F. Wong. aspdac 2001: 589-594 [doi]

OC-3072 packet classification using BDDs and pipelined SRAMsAmit Prakash, Adnan Aziz. hoti 2001: 15-20 [doi]

Theory of safe replacements for sequential circuitsVigyan Singhal, Carl Pixley, Adnan Aziz, Robert K. Brayton. tcad, 20(2):249-265, 2001. [doi]

Buffer minimization in pass transistor logicHai Zhou, Adnan Aziz. tcad, 20(5):693-697, 2001. [doi]

2000

Model-checking continous-time Markov chainsAdnan Aziz, Kumud Sanwal, Vigyan Singhal, Robert K. Brayton. tocl, 1(1):162-170, 2000. [doi]

Sequential synthesis using S1SAdnan Aziz, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli. tcad, 19(10):1149-1162, 2000. [doi]

An Abstraction Algorithm for the Verification of Generalized C-Slow DesignsJason Baumgartner, Anson Tripp, Adnan Aziz, Vigyan Singhal, Flemming Andersen. cav 2000: 5-19

Meeting Delay Constraints in DSM by Minimal Repeater InsertionI-Min Liu, Adnan Aziz, D. F. Wong. date 2000: 436-440 [doi]

Delay Constrained Optimization by Simultaneous Fanout Tree Construction, Buffer Insertion/Sizing and Gate SizingI-Min Liu, Adnan Aziz. iccd 2000: 209-214 [doi]

Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertionI-Min Liu, Tan-Li Chou, Adnan Aziz, D. F. Wong. ispd 2000: 33-38 [doi]

Automatic Lighthouse Generation for Directed State Space SearchPraveen Yalagandula, Adnan Aziz, Vigyan Singhal. date 2000: 237-242 [doi]

Automatic Vector Generation Using Constraints and BiasingJun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz. et, 16(1-2):107-120, 2000. [doi]

Buffer minimization in pass transistor logicHai Zhou, Adnan Aziz. ispd 2000: 105-110 [doi]

Simultaneous routing and buffer insertion with restrictions onbuffer locationsHai Zhou, Martin D. F. Wong, I-Min Liu, Adnan Aziz. tcad, 19(7):819-824, 2000. [doi]

1999

Equivalences for Fair Kripke StructuresAdnan Aziz, Felice Balarin, Vigyan Singhal, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli. cjtcs, 1999, 1999. [doi]

Model Checking the IBM Gigahertz Processor: An Abstraction Algorithm for High-Performance NetlistsJason Baumgartner, Tamir Heyman, Vigyan Singhal, Adnan Aziz. cav 1999: 72-83 [doi]

Enhancing Simulation with BDDs and ATPGMalay K. Ganai, Adnan Aziz, Andreas Kuehlmann. dac 1999: 385-390 [doi]

Performance Driven Synthesis for Pass-Transistor LogicTai-Hung Liu, Malay K. Ganai, Adnan Aziz, Jeffrey L. Burns. vlsid 1999: 372-377

An Efficient Buffer Insertion Algorithm for Large Networks Based on Lagrangian RelaxationI-Min Liu, Adnan Aziz, D. F. Wong, Hai Zhou. iccd 1999: 210-215 [doi]

Formal Verification of a Snoop-Based Cache Coherence Protocol Using Symbolic Model CheckingSrivatsan Srinivasan, Parminder Singh Chhabra, Praveen Kumar Jaini, Adnan Aziz, Lizy Kurian John. vlsid 1999: 288-293 [doi]

Modeling design constraints and biasing in simulation using BDDsJun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz. iccad 1999: 584-590 [doi]

Simultaneous Routing and Buffer Insertion with Restrictions on Buffer LocationsHai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz. dac 1999: 96-99 [doi]

1998

1997

1996

1995

1994

Minimizing Interacting Finite State Machines: A Compositional Approach to Language to ContainmentAdnan Aziz, Vigyan Singhal, Gitanjali Swamy, Robert K. Brayton. iccd 1994: 255-261

Formula-Dependent Equivalence for Compositional CTL Model CheckingAdnan Aziz, Thomas R. Shiple, Vigyan Singhal. cav 1994: 324-337

BDD Variable Ordering for Interacting Finite State MachinesAdnan Aziz, Serdar Tasiran, Robert K. Brayton. dac 1994: 283-288 [doi]

Equivalences for Fair Kripke StructuresAdnan Aziz, Vigyan Singhal, Felice Balarin, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli. icalp 1994: 364-375

HSIS: A BDD-Based Environment for Formal VerificationAdnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli. dac 1994: 454-459 [doi]

Multi-level synthesis for safe replaceabilityCarl Pixley, Vigyan Singhal, Adnan Aziz, Robert K. Brayton. iccad 1994: 442-449 [doi]

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