| 5 | -- | 26 | Joel M. Tendler, J. Steve Dodson, J. S. Fields Jr., Hung Le, Balaram Sinharoy. POWER4 system microarchitecture |
| 27 | -- | 52 | James D. Warnock, John M. Keaty, John G. Petrovick, Joachim G. Clabes, Charles J. Kircher, Byron Krauter, Phillip Restle, Brian A. Zoric, Carl J. Anderson. The circuit and physical design of the POWER4 microprocessor |
| 53 | -- | 76 | John M. Ludden, Wolfgang Roesner, Gerry M. Heiling, John R. Reysa, Jonathan R. Jackson, Bing-Lun Chu, Michael L. Behm, Jason Baumgartner, Richard D. Peterson, Jamee Abdulhafiz, William E. Bucy, John H. Klaus, Danny J. Klema, Tien N. Le, F. Danette Lewis, Philip E. Milling, Lawrence A. McConville, Bradley S. Nelson, Viresh Paruthi, Travis W. Pouarz, Audre D. Romonosky, Jeff Stuecheli, Kent D. Thompson, Dave W. Victor, Bruce Wile. Functional verification of the POWER4 microprocessor and POWER4 multiprocessor system |
| 77 | -- | 86 | Douglas C. Bossen, Alongkorn Kitamorn, Kevin Reick, Michael S. Floyd. Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology |
| 87 | -- | 96 | Gregory P. Rodgers, Isidore G. Bendrihem, Thomas J. Bucelot, Barry D. Burchett, John C. Collins. Infrastructure requirements for a large-scale, multi-site VLSI development project |
| 97 | -- | 0 | Ramesh C. Agarwal, Robert F. Enenkel, Fred G. Gustavson, Alok Kothari, Mohammad Zubair. Fast pseudorandom-number generators with modulus 2k or 2k - 1 using fused multiply-ad |