Thomas J. Bucelot - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 10 from 10

2015

TMDavid Shan, Phillip Restle, Doug Malone, Robert Groves, Eric Lai, Michael Koch, Jason Hibbeler, Yong Kim, Christos Vezyrtzis, Jan Feder, David Hogenmiller, Thomas J. Bucelot. vlsic 2015: 322 [doi]

2014

TM microprocessorPhillip Restle, David Shan, David Hogenmiller, Yong Kim, Alan J. Drake, Jason Hibbeler, Thomas J. Bucelot, Gregory S. Still, Keith A. Jenkins, Joshua Friedrich. isscc 2014: 100-101 [doi]

2013

On-chip circuit for measuring multi-GHz clock signal waveformsK. A. Jenkins, Phillip Restle, P. Z. Wang, D. Hogenmiller, D. Boerstler, Thomas J. Bucelot. vts 2013: 1-4 [doi]

2009

A Resonant Global Clock Distribution for the Cell Broadband Engine ProcessorSteven C. Chan, Phillip J. Restle, Thomas J. Bucelot, John S. Liberty, Stephen Weitzel, John M. Keaty, Brian K. Flachs, Richard Volant, Peter Kapusta, Jeffrey S. Zimmerman. jssc, 44(1):64-72, 2009. [doi]

2008

A Resonant Global Clock Distribution for the Cell Broadband-Engine ProcessorSteven C. Chan, Phillip Restle, Thomas J. Bucelot, Steve Weitzel, John M. Keaty, John S. Liberty, Brian K. Flachs, Richard Volant, Peter Kapusta, Jeffrey S. Zimmerman. isscc 2008: 512-513 [doi]

2005

Characterization of the impact of interconnect design on the capacitive load driven by a global clock distributionGerald G. Lopez, Giovanni Fiorenza, Thomas J. Bucelot, Phillip Restle, Mary Yvonne Lanzerotti. glvlsi 2005: 38-43 [doi]

2003

Loop-based interconnect modeling and optimization approach for multigigahertz clock network designXuejue Huang, Phillip J. Restle, Thomas J. Bucelot, Yu Cao, Tsu-Jae King 0001, Chenming Hu. jssc, 38(3):457-463, 2003. [doi]

2002

Loop-based interconnect modeling and optimization approach for multi-GHz clock network designXuejue Huang, Phillip J. Restle, Thomas J. Bucelot, Yu Cao, Tsu-Jae King 0001. cicc 2002: 19-22 [doi]

Infrastructure requirements for a large-scale, multi-site VLSI development projectGregory P. Rodgers, Isidore G. Bendrihem, Thomas J. Bucelot, Barry D. Burchett, John C. Collins. ibmrd, 46(1):87-96, 2002. [doi]

1991

A 4-Mb low-temperature DRAMWalter H. Henkels, Duen-Shun Wen, Rick L. Mohler, Robert L. Franch, Thomas J. Bucelot, Christopher W. Long, John A. Bracchitta, W. J. Cote, Gary B. Bronner, Yuan Taur, Robert H. Dennard. jssc, 26(11):1519-1529, November 1991. [doi]

Sign in or sign up to see more results.

runs on WebDSL