Journal: IJHPSA

Volume 2, Issue 3/4

132 -- 144Pavel Ghosh, Arunabha Sen. Energy efficient mapping and voltage islanding for regular NoC under design constraints
145 -- 155Xiongli Gu, Peng Liu 0016, Zhiyuan Xu, Bingjie Xia, Cheng Li, Qingdong Yao, Ce Shi. A synergetic operating unit on NoC layer for CMP system
156 -- 167Yoon Seok Yang, Jun Ho Bahn, Seung Eun Lee, Jungsook Yang, Nader Bagherzadeh. Parallel processing for block ciphers on a fault tolerant networked processor array
168 -- 176Bingjie Xia, Kejun Wu, Chunchang Xiang, Mei Yang, Peng Liu 0016, Qingdong Yao. Network interface design based on mutual interface definition
177 -- 186George Kornaros. NCXplore: a design space exploration framework of temporal encoding for on-chip serial interconnects
187 -- 202Danilo Pani, Francesca Palumbo, Luigi Raffo. A fast MPI-based parallel framework for cycle-accurate HDL multi-parametric simulations
203 -- 214Christipher D. Jenkins, Michael J. Schulte, John Glossner. Instruction set extensions for the advanced encryption standard on a multithreaded software defined radio platform
215 -- 228Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia, Giacomo Gabrielli, Cosimo Antonio Prete. Way adaptable D-NUCA caches
229 -- 239Wei Zhang 0002. Replica victim caching to improve cache reliability against transient errors
240 -- 249Fangyang Shen, Andres Salazar, Xiao Qin, Min-Te Sun. A reliability model of energy-efficient parallel disk systems with data mirroring

Volume 2, Issue 2

71 -- 80Ricardo Santos, Rafael Batistella, Rodolfo Azevedo. A pattern based instruction encoding technique for high performance architectures
81 -- 89João V. F. Lima, Nicolas Maillard. Online mapping of MPI-2 dynamic tasks to processes and threads
90 -- 98Leandro Sales, Henrique Teofilo, Nabor C. Mendonça, Jonathan D'Orleans, Rafael G. Barbosa, Fernando Trinta. An evaluation of the performance impact of generic group communication APIs
99 -- 106Douglas Dyllon Jeronimo de Macedo, Aldo von Wangenheim, Mario A. R. Dantas, Hilton Ganzo William Perantunes. An architecture for DICOM medical images storage and retrieval adopting distributed file systems
107 -- 115Cristiano Bonato Both, Cristiano Battisti, Felipe A. Kuentzer, Tatiana Gadelha Serra dos Santos, Rafael R. dos Santos. FPGA implementation and performance evaluation of an RFC 2544 compliant Ethernet test set
116 -- 128Bernardo Fortunato Costa, Marta Mattoso, Inês de Castro Dutra. Applying reinforcement learning to scheduling strategies in an actual grid environment

Volume 2, Issue 1

1 -- 15D. Meganathan, J. Raja Paul Perinbam, R. Deepalakshmi. High speed, low power 100 MS/s front end track-and-hold amplifier for ten-bit pipelined ADC
16 -- 25Fabiane Cristine Dillenburg, Jorge Luis Victória Barbosa. Context-oriented exception handling
26 -- 34Alexandre Solon Nery, Nadia Nedjah, Felipe M. G. França. A massively parallel hardware architecture for ray-tracing
35 -- 45Subhendu Kumar Sahoo, Chandra Shekhar, Sudeepti Kodali, Abhijit R. Asati, Anu Gupta. Dual channel addition based FFT processor architecture for signal and image processing
46 -- 57Marcus Vinicius Carvalho da Silva, Nadia Nedjah, Luiza de Macedo Mourelle. Efficient mapping of an image processing application for a network-on-chip based implementation
58 -- 67Thatyana de Faria Piola Seraphim, Enzo Seraphim, Gonzalo Travieso. HieraAnalyses - a tool for hierarchical analysis of parallel programs