External Links

    Journal: Integration

    Volume 6, Issue 2

    127 -- 146Y. C. Hsu, William J. Kubitz. ALSO: A system for chip floorplan design
    147 -- 178Francky Catthoor, Hugo De Man, Joos Vandewalle. SAMURAI: A general and efficient simulated-annealing schedule with fully adaptive annealing parameters
    179 -- 199Wentai Liu, Ralph K. Cavin III. Rasterization theory, architectures, and implementations for a class of two-dimensional problems
    201 -- 212Selim G. Akl, Henk Meijer. On the bit complexity of parallel computations
    213 -- 227Satnam Singh Dlay. A practical IC design system for VLSI technology
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