Journal: Integration

Volume 31, Issue 2

101 -- 131José M. Mendías, Román Hermida, Olga Peñalba. A study about the efficiency of formal high-level synthesis applied to verification
133 -- 158Yumin Zhang, Xiaobo Sharon Hu, Danny Z. Chen. Cell selection from technology libraries for minimizing power
159 -- 182Suresh Raman, Sachin S. Sapatnekar, Charles J. Alpert. Probability-driven routing in a datapath environment
183 -- 194Y. Tsiatouhas, Yiannis Moisiadis, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni. A new technique for IDDQ testing in nanometer technologies

Volume 31, Issue 1

1 -- 49Jiang Hu, Sachin S. Sapatnekar. A survey on multi-net global routing for integrated circuits
51 -- 63Rolf Drechsler, Wolfgang Günther. History-based dynamic BDD minimization
65 -- 77Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu. Floorplanning with abutment constraints based on corner block list
79 -- 100Luca Fanucci, Sergio Saponara, Lorenzo Bertini. A parametric VLSI architecture for video motion estimation