Journal: IEEE Micro

Volume 23, Issue 6

5 -- 0. Letters
8 -- 10Charles R. Moore, Kevin W. Rudd, Ruby B. Lee, Pradip Bose. Guest Editors Introduction: Micro s Top Picks from Microarchitecture Conferences
11 -- 19Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan. Checkpoint Processing and Recovery: An Efficient, Scalable Alternative to Reorder Buffers
20 -- 25Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt. Runahead Execution: An Effective Alternative to Large Instruction Windows
26 -- 35Michael K. Chen, Kunle Olukotun. The Jrpm System for Dynamically Parallelizing Sequential Java Programs
36 -- 45Christoforos E. Kozyrakis, David A. Patterson. Scalable Vector Processors for Embedded Systems
46 -- 51Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore. Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture
52 -- 61Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan. Temperature-Aware Computer Systems: Opportunities and Challenges
62 -- 68Grigorios Magklis, Greg Semeraro, David H. Albonesi, Steve Dropsho, Sandhya Dwarkadas, Michael L. Scott. Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor
70 -- 75Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin. Measuring Architectural Vulnerability Factors
76 -- 83Mohamed A. Gomaa, Chad Scarbrough, T. N. Vijaykumar, Irith Pomeranz. Transient-Fault Recovery for Chip Multiprocessors
84 -- 93Timothy Sherwood, Erez Perelman, Greg Hamerly, Suleyman Sair, Brad Calder. Discovering and Exploiting Program Phases
94 -- 98Alaa R. Alameldeen, David A. Wood. Addressing Workload Variability in Architectural Simulations
99 -- 107Changkyu Kim, Doug Burger, Stephen W. Keckler. Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches
108 -- 116Milo M. K. Martin, Mark D. Hill, David A. Wood. Token Coherence: A New Framework for Shared-Memory Multiprocessors
117 -- 125Ravi Rajwar, James A. Goodman. Transactional Execution: Toward Reliable, High-Performance Multithreading
126 -- 134José F. Martínez, Josep Torrellas. Speculative Synchronization: Programmability and Performance for Parallel Codes