Journal: IEEE Micro

Volume 25, Issue 6

5 -- 0Pradip Bose. Designing microprocessors with robust functionality and performance
6 -- 7Shane Greenstein. Wireless access and electrical markets: Becoming similar?
8 -- 9Sarita V. Adve, Pia Sanda. Guest Editors Introduction: Reliability-Aware Microarchitecture
10 -- 16Shekhar Y. Borkar. Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation
18 -- 29Ravishankar K. Iyer, Nithin Nakka, Zbigniew Kalbarczyk, Subhasish Mitra. Recent Advances and New Avenues in Hardware-Level Reliability Support
30 -- 39Giacinto Paolo Saggese, Nicholas J. Wang, Zbigniew Kalbarczyk, Sanjay J. Patel, Ravishankar K. Iyer. An Experimental Study of Soft Errors in Microprocessors
40 -- 49Zhijian Lu, John Lach, Mircea R. Stan, Kevin Skadron. Improved Thermal Management with Reliability Banking
51 -- 59Brian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, Andreas Nowatzyk. TRUSS: A Reliable, Scalable Server Architecture
60 -- 70M. Wasiur Rashid, Edwin J. Tan, Michael C. Huang, David H. Albonesi. Power-Efficient Error Tolerance in Chip Multiprocessors
71 -- 78Daniel L. Stasiak, Rajat Chaudhry, Dennis Cox, Stephen D. Posluszny, James D. Warnock, Steve Weitzel, Dieter F. Wendel, Michael Wang. Cell Processor Low-Power Design Methodology
79 -- 81Philip G. Emma. Writing the claims for a patent
82 -- 84Richard Mateosian. Year-end cleanup
85 -- 88Richard Stern. Transnational electronic systems and patent infringement

Volume 25, Issue 5

5 -- 0Pradip Bose. High performance at affordable power
6 -- 9Kunio Uchiyama, Pradip Bose. Guest Editors Introduction: Energy-Efficient Design
10 -- 18Osamu Takahashi, Scott R. Cottier, Sang H. Dhong, Brian K. Flachs, Joel Silberman. Power-Conscious Design of the Cell Processor s Synergistic Processor Element
20 -- 29Seiji Maeda, Shigehiro Asano, Tomofumi Shimada, Koichi Awazu, Haruyuki Tago. A Real-Time Software Platform for the Cell Processor
30 -- 38Toru Asano, Joel Silberman, Sang H. Dhong, Osamu Takahashi, Michael White, Scott R. Cottier, Takaaki Nakazato, Atsushi Kawasumi, Hiroshi Yoshihara. Low-Power Design Approach of 11FO4 256-Kbyte Embedded SRAM for the Synergistic Processor Element of a Cell Processor
39 -- 51Canturk Isci, Alper Buyuktosunoglu, Margaret Martonosi. Long-Term Workload Phases: Duration Predictions and Applications to DVFS
52 -- 62Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark. Formal Control Techniques for Power-Performance Management
64 -- 76Diana Marculescu, Emil Talpes. Energy Awareness and Uncertainty in Microarchitecture-Level Design
79 -- 81Philip G. Emma. Patents: To file or not to file?
83 -- 84Shane Greenstein. Outsourcing and climbing a value chain

Volume 25, Issue 4

5 -- 6Pradip Bose. Presilicon modeling: challenges in the late CMOS era
7 -- 9Philip G. Emma. What is patentable?
10 -- 19Zhichun Zhu, Xiaodong Zhang. Look-Ahead Architecture Adaptation to Reduce Processor Power Consumption
20 -- 32Yen-Jen Chang, Feipei Lai. Dynamic Zero-Sensitivity Scheme for Low-Power Cache Memories
34 -- 47Jon Beecroft, David Addison, David Hewson, Moray McLaren, Duncan Roweth, Fabrizio Petrini, Jarek Nieplocha. QsNetII: Defining High-Performance Network Design
48 -- 63Mohammad J. Akhbarizadeh, Mehrdad Nourani, Cyrus D. Cantrell. Prefix Segregation Scheme for a TCAM-Based IP Forwarding Engine
64 -- 72Weidong Wu, Jian Shi, Ling Zuo, Bingxin Shi. Power-Efficient TCAMS for Bursty Access Patterns
73 -- 76Richard H. Stern. Standardization skullduggery update: UMTS standard
77 -- 79Shane Greenstein. Explorers and expanders, both early and late
79 -- 80Richard Mateosian. Going through the database

Volume 25, Issue 3

5 -- 6Pradip Bose. Integrated microarchitectures
7 -- 9Richard H. Stern. The antitrust ghost in the standard-setting machine
10 -- 12Shane Greenstein. The anatomy of foresight traps
13 -- 15Richard Mateosian. Dealing with globalization
16 -- 31Michael J. Flynn, Patrick Hung. Microprocessor Design Issues: Thoughts on the Road Ahead
32 -- 45Shailender Chaudhry, Paul Caprioli, Sherman Yip, Marc Tremblay. High-Performance Throughput Computing
48 -- 57Adrián Cristal, Oliverio J. Santana, Francisco J. Cazorla, Marco Galluzzi, Tanausú Ramírez, Miquel Pericàs, Mateo Valero. Kilo-Instruction Processors: Overcoming the Memory Wall
58 -- 69Tilak Agerwala, Siddhartha Chatterjee. Computer Architecture: Challenges and Opportunities for the Next Decade
70 -- 80Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, Jude A. Rivers. Lifetime Reliability: Toward an Architectural Solution
81 -- 92Mancia Anguita, J. Manuel Martinez-Lechado. MP3 Optimization Exploiting Processor Architecture and using Better Algorithms
93 -- 96Philip G. Emma. Inventions and the creative process

Volume 25, Issue 2

5 -- 0Pradip Bose. Variation-tolerant design
6 -- 7Richard Mateosian. Thinking about history and design
8 -- 9William J. Dally, Keith Diefendorff. Hot Chips 16: Power, Parallelism, and Memory Performance
10 -- 20Cameron McNairy, Rohit Bhatia. Montecito: A Dual-Core, Dual-Thread Itanium Processor
21 -- 29Poonacha Kongetira, Kathirgamar Aingaran, Kunle Olukotun. Niagara: A 32-Way Multithreaded Sparc Processor
30 -- 40Rajesh Kota, Rich Oehler. Horus: Large-Scale Symmetric Multiprocessing for Opteron Systems
41 -- 51John Montrym, Henry P. Moreton. The GeForce 6800
52 -- 59Hans Eberle, Sheueling Chang Shantz, Vipul Gupta, Nils Gura, Leonard Rarick, Lawrence Spracklen. Accelerating Next-Generation Public-Key Cryptosystems on General-Purpose CPUs
60 -- 69Jorg Keller, Andreas Gravinghoff. Thread-Based Virtual Duplex Systems in Embedded Environments
70 -- 72Shane Greenstein. Communications consolidation after an era of no restraints

Volume 25, Issue 1

5 -- 0Pradip Bose. The power of communication
7 -- 0Richard H. Stern. FTC cracks down on spyware and PC hijacking, but not true lies
8 -- 9James P. G. Sterbenz, Dimitrios Stiliadis. Guest Editors Introduction: Hot Interconnects 12
10 -- 18Venkata Krishnan, David Mayhew. Localized Congestion Control in Advanced Switching Interconnects
20 -- 29Jiuxing Liu, Amith R. Mamidala, Abhinav Vishnu, Dhabaleswar K. Panda. Evaluating InfiniBand Performance with PCI Express
30 -- 40Thomas H. Dunigan Jr., Jeffrey S. Vetter, James B. White III, Patrick H. Worley. Performance Evaluation of the Cray X1 Distributed Shared-Memory Architecture
41 -- 49Avinash Karanth Kodi, Ahmed Louri. Design of a High-Speed Optical Interconnect for Scalable Shared-Memory Multiprocessors
50 -- 59Fang Yu, Randy H. Katz, T. V. Lakshman. Efficient Multimatch Packet Classification and Lookup with TCAM
60 -- 69Bharath Madhusudan, John W. Lockwood. A Hardware-Accelerated System for Real-Time Worm Detection
70 -- 78Srikanth Arekapudi, Shang-Tse Chuang, Isaac Keslassy, Nick McKeown. Using Hardware to Configure a Load-Balanced Switch
80 -- 89Ayose Falcón, Jared Stark, Alex Ramírez, Konrad K. Lai, Mateo Valero. Better Branch Prediction Through Prophet/Critic Hybrids
90 -- 97Kyle J. Nesbit, James E. Smith. Data Cache Prefetching Using a Global History Buffer
98 -- 99Richard Mateosian. Too much information
102 -- 104Shane Greenstein. Not a mellifluous march to maturity