Journal: SIGARCH Computer Architecture News

Volume 16, Issue 5

12 -- 19Herbert H. J. Hum, Guang R. Gao. Summary of the workshop on frontiers in functional programming and dataflow architecture
20 -- 25André M. Van Tilborg. Instrumentation for distributed computing systems
26 -- 32Glenn W. Griffin. The ultimate ultimate RISC
33 -- 34Douglas W. Jones. Risks of comparing RISCs
35 -- 51Mahsoo Naderi. Modelling and performance evaluation of multiprocessors, organizations with multi-memory units
52 -- 65Peter M. Kogge, John V. Oldfield, Mark R. Brule, Charles D. Stormon. VLSI and rule-based systems
76 -- 0Behrooz Parhami. Book review: Memory Storage Patterns in Parallel Processing by Mary A. Mace (Kluwer Academic Publishers, Boston, 1987, 139 pp.)

Volume 16, Issue 4

11 -- 0Umakishore Ramachandran. Preface to the Special Issue on Architectural Support for Operating Systems
12 -- 20Abhaya Asthana, H. V. Jagadish, J. A. Chandross, D. Lin, Scott C. Knauer. An intelligent memory system
21 -- 30Monica Beltrametti, Kenneth Bobey, John R. Zorbas. The control mechanism for the Myrias parallel computer system
31 -- 36Raphael A. Finkel, Debra Hensgen. YACKOS on a shared-memory multiprocessor
37 -- 46Marc F. Pucci, James L. Alberi. Optimized communication in an extended remote procedure call model
45 -- 50Jordi Cortadella, Teodor Jové. Dynamic RAM for on-chip instruction caches
51 -- 74Mahsoo Naderi. Modelling and performance evaluation of multiprocessors organization with shared memories
75 -- 107Edward F. Gehringer, Janne Abullarade, Michael H. Gulyn. A survey of commercial parallel processors
108 -- 116Mark Lease, Mac Lively. Comparing production system architectures
117 -- 129Ivor P. Page, Jeff Niehaus. The Flex architecture, a high speed graphics processor
130 -- 137Kazuaki J. Murakami, Akira Fukuda, Toshinori Sueyoshi, Shinji Tomita. An overview of the Kyushu University reconfigurable parallel processor
138 -- 144Ora E. Percus, Jerome K. Percus. Some results concerning clock-regulated queues
145 -- 149Fleur Liane Williams. Should SCC set condition codes?
150 -- 156Gordon B. Steven. A novel effective address calculation mechanism for RISC microprocessors
157 -- 168Behrooz Parhami. From defects to failures: a view of dependable computing
169 -- 191David A. Patterson. RISCY patents
192 -- 193Helen C. Takacs. Book review: A VLSI Architecture for Concurrent Data Structures by William J. Dally (Kluwer 1988)
193 -- 195Robert P. Colwell. Book review: Computer Architecture and Organization, 2nd ed. by John P. Hayes (McGraw Hill, 1988)
195 -- 196Charles E. McDowell. Book review: Supercomputer Architectures by Paul B. Schneck (Kluwer Academic Publishers)

Volume 16, Issue 3

3 -- 6David R. Cheriton, Patrick D. Boyle, Gert Slavenburg. Comments on "'Coherency for multiprocessor virtual addresses caches' by James R. Goodman"
7 -- 0James R. Goodman. Reply to David R. Cheriton's, Pat Boyle's, and Gert A. Slavenburg's "Comments on 'Coherency for multiprocessor virtual addressed caches' by James R. Goodman"
9 -- 16Guy Rabbat, Borko Furht, Ron Kibler. Three-dimensional computers and measuring their performance
17 -- 24Michel Castan, Alessandro Contessa, Eric Cousin, C. Coustet, Bernard Lécussan. MaRs: a parallel graph reduction multiprocessor
25 -- 32Alessandro Contessa. An approach to fault tolerance and error recovery in a parallel graph reduction machine: MaRS - a case study
33 -- 39Chuck Crawford. Evolution of the Harris H-series computers and speculations on their future
40 -- 43Philip l. Good. Structuring an instruction cache
44 -- 47Eric E. Johnson. Completing an MIMD multiprocessor taxonomy
48 -- 55Douglas W. Jones. The ultimate RISC
56 -- 63Douglas W. Jones. A minimal CISC
64 -- 70Stanley E. Lass. Shared cache multiprocessing with pack computers
71 -- 80Norman P. Jouppi. Superscalar vs. superpipelined machines
81 -- 84Lorne H. Schachter. Book review of "High-performance computer architecture by Harold S. Stone. Addison-Wesley 1987

Volume 16, Issue 1

6 -- 0T. Clif Penn. Preface to the Special issue on Neural Networks
7 -- 25Richard P. Lippmann. An introduction to computing with neural nets
26 -- 36James A. Anderson, Edward J. Wisniewski, Susan R. Viscuso. Software for neural networks
37 -- 44Simon Garth, Danny Pike. An integrated system for neural network simulations
45 -- 46A. Jean Maren. Conference report: IEEE 1'st Int'l conference on neural networks
47 -- 69Jack J. Dongarra. Performance of various computers using standard linear equations software in a FORTRAN environment
70 -- 84William A. Wulf. The WM computer architecture
85 -- 90Daniel Tabak. Logarithmic indices for multiprocessor evaluation
91 -- 99Martin Dowd. An example RISC vector machine architecture
100 -- 102Martin Dowd. RISC vector CPU's and crossbars in desktops
103 -- 0Stanley E. Lass. Multiple instructions/operands per access to cache memory
104 -- 108Wanda Gass. Workshop report: synthesis of foo bars
109 -- 0F. Joel Ferguson. Book Review: Logic Design Principles by Edward J. McCluskey: Prentice-Hall Publishers, Englewood Cliffs, New Jersey, 549 pp., $39.95