| 1405 | -- | 1417 | Yanbing Li, Wayne Wolf. Hardware/software co-synthesis with memory hierarchies |
| 1418 | -- | 1434 | Wei-Chun Chou, Peter A. Beerel, Kenneth Y. Yun. Average-case technology mapping of asynchronous burst-mode circuits |
| 1435 | -- | 1441 | Hoan H. Pham, Arokia Nathan. An integral equation of the second kind for computation of capacitance |
| 1442 | -- | 1451 | Le-Chin Eugene Liu, Carl Sechen. Multilayer chip-level global routing using an efficient graph-based Steiner tree heuristic |
| 1452 | -- | 1461 | Le-Chin Eugene Liu, Carl Sechen. Multilayer pin assignment for macro cell circuits |
| 1462 | -- | 1479 | Hsiao-Ping Tseng, Carl Sechen. A gridless multilayer router for standard cell circuits using CTMcells |
| 1480 | -- | 1486 | Gerard A. Allan, Anthony J. Walton. Efficient extra material critical area algorithms |
| 1487 | -- | 1495 | Kwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai. Fault emulation: A new methodology for fault grading |
| 1496 | -- | 1508 | Sujit Dey, Anand Raghunathan, Niraj K. Jha, Kazutoshi Wakabayashi. Controller-based power management for control-flow intensive designs |
| 1508 | -- | 1511 | Mahesh B. Patil. Extension of the VR discretization scheme for velocity saturation |
| 1512 | -- | 1519 | Massoud Pedram, Bryan Preas. Interconnection analysis for standard cell layouts |
| 1519 | -- | 1526 | Jin-Tai Yan. An efficient cut-based algorithm on minimizing the number of L-shaped channels for safe routing ordering |
| 1527 | -- | 1527 | Robert P. Dick, Niraj K. Jha. Corrections to mogac: a multiobjective genetic algorithm for hardware-software cosynthesis of distributed embedded systems |