Journal: IEEE Trans. on CAD of Integrated Circuits and Systems

Volume 18, Issue 12

1689 -- 1701Haris Lekatsas, Wayne Wolf. SAMC: a code compression algorithm for embedded processors
1702 -- 1714Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkonjak, Mani B. Srivastava. Power optimization of variable-voltage core-based systems
1715 -- 1729Kamal S. Khouri, Ganesh Lakshminarayana, Niraj K. Jha. High-level synthesis of low-power control-flow intensive circuits
1730 -- 1740Alfredo J. Piazza, Can E. Korman, Amro M. Jaradeh. A physics-based semiconductor noise model suitable for efficient numerical implementation
1741 -- 1749Wolfgang Pyka, Peter Fleischmann, Bernhard Haindl, Siegfried Selberherr. Three-dimensional simulation of HPCVD-linking continuum transport and reaction kinetics with topography simulation
1750 -- 1758Alexandre Linhares, Horacio Hideki Yanasse, José Ricardo de Almeida Torreao. Linear gate assignment: a fast statistical mechanics approach
1759 -- 1767Youxin Gao, Martin D. F. Wong. Wire-sizing optimization with inductance consideration using transmission-line model
1768 -- 1779Haluk Konuk. Voltage- and current-based fault simulation for interconnect open defects
1780 -- 1792Kent L. Einspahr, Shashank K. Mehta, Sharad C. Seth. A synthesis for testability scheme for finite state machines using clock control
1793 -- 1802Kuen-Jong Lee, Jih-Jeen Chen, Cheng-Hua Huang. Broadcasting test patterns to multiple circuits
1803 -- 1816Andreas G. Veneris, Ibrahim N. Hajj. Design error diagnosis and correction via test vector simulation
1817 -- 1824Ashok Vittal, Lauren Hui Chen, Malgorzata Marek-Sadowska, Kai-Ping Wang, Sherry Yang. Crosstalk in VLSI interconnections